• Title/Summary/Keyword: Clamping circuit

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High Efficiency and Low Device Stress Voltage and Current Clamping ZVS PWM Asymmetrical Half Bridge Converter

  • Han Sang Kyoo;Moon Gun-Woo;Youn Myung Joong
    • Proceedings of the KIPE Conference
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    • 2004.07a
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    • pp.341-345
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    • 2004
  • A high efficiency and low device stress voltage and current clamping BVS PWM asymmetrical half bridge converter is proposed in this paper. To achieve the ZVS of power switches along the wide load range, the transformer leakage inductor $L_{Ikg}$ is increased. Then, to solve the problem related to ringing in the secondary rectifier caused by the resonance between $L_{Ikg}$ and rectifier junction capacitors, the proposed converter employs a voltage and current clamping cell, which helps voltages and currents of rectifier diodes to be clamped at the output voltage and output current, respectively. Therefore, no RC-snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since all energy stored in $L_{Ikg}$ is transferred to the output side, the circulating energy problem can be effectively solved and duty loss does net exist. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385-170Vdc prototype are presented.

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A New Snubber Circuit for Four-Level Inverter and Converter (4-레벨 인버터 및 컨버터를 위한 새로운 스너버회로)

  • Kim, In-Dong;No, Ui-Cheol
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.49 no.9
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    • pp.598-606
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    • 2000
  • This paper proposes a new snubber circuit for 4-level inverter and converter. The snubber circuit makes use of Undeland snubber and McMurray efficient snubber as basic snubber unit and can be regarded as a generalized combined Undeland and McMurray efficient snubber. The proposed snubber keeps such good features as fewer number of components improved efficiency due to low snubber loss capability of clamping overvoltage across main switching devices and no unbalance problem of blocking voltage. Furthermore the proposed concept of constructing a snubber circuit for 4-level inverter and converter can apply to any level of converterand inverter.

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VLSIs for the MAC TV System - Part III. A Data and Clock Recovery Circuit (MAC 방식 TV 시스템용 IC의 설계 - III. 신호 및 클럭 복원기)

  • Moon, Yong;Jeong, Deog-Kyoon
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.12
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    • pp.1644-1651
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    • 1995
  • A data and clock recovery integrated circuit for MAC (Multiplexed Analog Component) TV standard is described. The chip performs the recovery of a system clock from a digitally encoded voice signal, clamping of a video signal for DC-level restoration, and precise gain control of a video signal in the presence of a large amplitude variation. A PLL (Phase Locked Loop) is used for timing recovery and a new gain control circuit is proposed which enhances its accuracy and dynamic range by employing two identical four-quadrant analog multipliers. The chip is designed in full custom with 1.5um BiCMOS technology, and layout verification is completed by post-simulation with the extracted circuit.

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A New Low Loss Snubber Circuit Suitable for Multilevel inverter and Converter

  • Kim, In-Dong;Nho, Eui-Cheol
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.541-546
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    • 1998
  • This paper proposes a new snubber circuit for multilevel inverter and converter. The snubber circuit makes use of Undeland snubber as basic snubber unit and can be regraded as a generalized Undeland snubber. The proposed snubber keeps such good features as fewer number of components, improved efficiency due to low loss snubber, capability of clamping overvoltage across main switching devices, and no unbalance problem of blocking voltage. Furthermore, the proposed concept of constructing a snubber circuit for multilevel inverter and converter can apply to any kind of basic snubber unit such as Holtz nondissipative snubber, McMurray efficient snubber, Lauritzen lossless snubber, etc which have been utilized for two-level inveter.

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A New Generalized Undeland Snubber Circuit for Multilevel Inverter and Converter (멀티레벨 인버터 및 컨버터를 위한 새로운 저손실 스너버)

  • Kim, In-Dong;Nho, Eui-Cheol
    • Proceedings of the KIEE Conference
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    • 1998.07f
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    • pp.1928-1930
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    • 1998
  • This paper proposes a new snubber circuit for multilevel inverter and converter. The snubber circuit makes use of Undeland snubber as basic snubber unit and can be regarded as a generalized Undeland snubber. The proposed snubber keeps such good features as fewer number of components, improved efficiency due to low loss snubber, capability of clamping overvoltage across main switching devices, and no unbalance problem of blocking voltage. Furthermore, the proposed concept of constructing a snubber circuit for multilevel inverter and converter can apply to any kind of basic snubber unit such as Holtz nondissipative snubber, McMurray efficient snubber, Lauritzen lossless snubber, etc which have been utilized for two-level inverter.

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An Isolated Soft-Switching Bidirectional Buck-Boost Inverter for Fuel Cell Applications

  • Zhang, Lianghua;Yang, Xu;Chen, Wenjie;Yao, Xiaofeng
    • Journal of Power Electronics
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    • v.10 no.3
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    • pp.235-244
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    • 2010
  • This paper presents a new isolated soft-switching bidirectional buck-boost inverter for fuel cell applications. The buck-boost inverter combines an isolated DC-DC converter with a conventional inverter to implement buck-boost DC-DC and DC-AC conversion. The main switches achieve zero voltage switching and zero current switching by using a novel synchronous switching SVPWM and the volume of the transformer in the forward and fly-back mode is also minimized. This inverter is suitable for wide input voltage applications due to its high efficiency under all conditions. An active clamping circuit reduces the switch's spike voltage and regenerates the energy stored in the leakage inductance of the transformer; therefore, the overall efficiency is improved. This paper presents the operating principle, a theoretical analysis and design guidelines. Simulation and experimental results have validated the characteristics of the buck-boost inverter.

Development of Back-emf Filter Circuit for Driving Sensorless BLDC Motors (BLDC 전동기의 센서리스 구동을 위한 역기전력 필터회로 개발)

  • Song, Doo-Young;Lee, Sung-Ho;Jung, Tae-Uk;Cho, Su-Eog;Park, Sung-Jun;Kim, Dong-Ok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.13 no.1
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    • pp.63-69
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    • 2008
  • The position of stator is essential when a trapezoidal BLDC motor is drived. In this paper we proposed a novel sensorless drive system for the trapezoidal BLDC motor without hall sensors or encoders. The resistor Y-connecting method is used to obtain Back-emf of a trapezoidal BLDC motor. Especially, by using the new Back-emf filter circuit proposed in this paper the sensorless characteristic in low speed is improved. The prototype proposed system applied for a 100[W] rating BLDC motor is made and the propriety of the Back-EMF filter circuit is also verified.

An Improved Gate Control Scheme for Overvoltage Clamping Under High Power IGBTs Switching (대용량 IGBT 스위칭 시 과전압 제한을 위한 향상된 게이트 구동기법)

  • 김완중;최창호;이요한;현동석
    • The Transactions of the Korean Institute of Power Electronics
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    • v.3 no.3
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    • pp.222-230
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    • 1998
  • This paper proposes a new gate drive circuit for high power IGBTs which can reduce the harmful effect of reverse recovery current at turn-on and actively suppress the overvoltage across the driven IGBT at turn-off without a snubber circuit. The turn-on scheme decreases the rising rate of the collector current by inereasing the input capacitance at turn-on transient when the gate-emitter voltage goes above threshold voltage. It results in soft transient of the reverse recovery current with no variation in turn-on delay time. The turn-off driving scheme has adaptive feature to the amplitude of collector current, so that the overvoltage can be limited much effectively at the fault collector current. Experimental results under various normal and fault conditions prove the effectiveness of the proposed circuit.

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Currant Source GTO Inverter with Double Recovery Path of Commutation Energy by LCD (수동소자에 의한 축적에너지 2중 궤환방식 전류형 GTO 인버터의 입.출력 특성)

  • Kim, Jin-Pyo;Choi, Sang-Won;Lee, Jong-Ha
    • Proceedings of the KIEE Conference
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    • 1997.07f
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    • pp.2104-2106
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    • 1997
  • In order to develop the three phase GTO CSI with double recovery path of commutation energy by passive devices (LCD), we studied the clamping circuit to protect switching device and energy recovery circuit to recover absorbed energy of capacitor and DC inductor. In this paper, we investigated how DC input power is increased or decreased according to energy recovery path with or not in the three phase GTO current source inverter, we used a induction motor as inverter load, and controlled a induction motor with v/f constant control. Experimental results show that dissipated DC power is decreased in $9{\sim}14%$ by double recovery path. We also confirmed that the characteristics is met as compare simulation results with experimental results according to each frequency.

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The Characteristics of New Current Source GTO Inverter with Double Recovery Path of Commutation Energy (전류(轉流)에너지 2중 궤환방식 새로운 전류형 GTO 인버터의 특성)

  • Choi, Sang-Won;Kim, Jin-Pyo;Lee, Jong-Ha
    • Proceedings of the KIEE Conference
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    • 1997.11a
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    • pp.435-437
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    • 1997
  • In order to develop the three phase GTO CSI with double recovery path of commutation energy by passive devices (LCD), we studied the clamping circuit to protect switching device and energy recovery circuit to recover absorbed energy of capacitor and DC link inductor. In this paper, we investigated how DC input power is increased or decreased according to energy recovery path with or not in the three phase GTO current source inverter. We used a induction motor as the load of inverter, and controlled a induction motor with V/F constant control. Experimental results show that dissipated DC power is decreased and capacitor voltage Vc is effectively suppressed by double recovery path.

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