• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.778-781
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• 2002

In this paper, we designed the anti-fuse program circuit, and there are an anti-fuse program/sense/latch circuit, a negative voltage generator, power-up circuit and etc. in this circuit. An output voltage of a negative voltage generator is about -4,51V. We detected certainly it regardless of simulation result power rise time or temperature change to detect the anti-fuse program state of an anti-fuse program/sense/latch circuit and were able to know what performed a steady action. And as a result of having done a simulation while will change a resistance value voluntarily in order to check an anti-fuse resistance characteristic of this circuit oneself, it recognized as a programmed anti-fuse until 23k$\Omega$, and we were able to know that this circuit was a lot of margin than general anti-fuse resistance 500$\Omega$. Therefore, the anti-fuse program circuit of this study showed that was able to apply for configuration of the programmable logic device.

• Transactions on Electrical and Electronic Materials
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• v.5 no.1
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• pp.19-23
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• 2004

A novel method of high speed, accurate circuit simulation in 3-dimensional (3-D) parallel-plate capacitors is investigated. The basic concept of the circuit simulation methods is partial element equivalent circuit model. The three test structures of 3-D parallel-plate capacitors are fabricated by using multi-layer low-temperature co-fired ceramic (LTCC) process and their S-parameters are measured between 50 MHz and 5 GHz. S-parameters are converted to Y-parameters, for comparing measured data with simulated data. The circuit model parameters of the each building block are optimized and extracted using HSPICE circuit simulator. This method is convenient and accurate so that circuit design applications can be easily manipulated.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.7
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• pp.885-890
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• 2020

In the distance measurement system the time-to-digital conversion circuit used measures the distance using the time interval between the start signal and the stop signal. The time interval is generally converted to digital information using a counter circuit considering the response speed. Therefore, a clock signal with a high frequency is required to improve precision, and a clock signal with a high frequency is also required to measure fine distances. In this paper, a counter circuit was designed to increase the accuracy of distance measurement while using the same frequency. The circuit design was performed using a 0.18㎛ CMOS process technology, and the operation of the designed circuit was confirmed through HSPICE simulation. As a result of the simulation, it is possible to obtain an improvement of four times the precision compared to the case of using a general counter circuit.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.12
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• pp.589-595
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• 2004

The ESD protection characteristic of chip varistors on a circuit board can not be analyzed by using a conventional circuit simulator due to its microwave characteristic. Thus, by employing Agilent's microwave circuit simulator ADS, we showed that the ESD Protection characteristic or chip varistors can be investigated. order to got more precise simulation results, a chip varistor model was extracted from the electrical characteristic of a TDK's chip varistor and the distributed circuit based pattern was designed as the ESD propagation path. The simulation results showed that the ESD protection characteristic of a chip varistors can be improved drastically by reducing the ESD propagation path.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.8 no.1
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• pp.1-5
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• 2009

In this paper, we propose a method that applies Vector Fitting (VF) technique to the equivalent circuit model for RF passive components. These days wireless communication system is getting smaller and smaller. So EMI/EMC is an issue in RF. We can solve PI/SI (Power Integrity/Signal Integrity) that one of EMI/EMC problem apply IFFT for 3D EM simulation multiple with input signal. That is time consuming task. Therefore equivalent circuit model using RF passive component is important. VF schemes are implemented to obtain the rational functions. S parameters of the equivalent circuit model is compared to those of EM simulation in case of the microstrip line structure.

• Journal of IKEEE
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• v.21 no.2
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• pp.150-153
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• 2017

In this paper, a structure of GCNMOS based ESD protection circuit using floating-body technique is proposed. TCAD simulation of Synopsys was used to compare with the conventional GGNMOS and GCNMOS. Compared with the conventional GCNMOS, the proposed ESD protection circuit has lower trigger voltage and faster turn-on-time than conventional circuit because of the added NMOSFET. In the simulation result, the triggering voltage of the proposed ESD protection circuit is 4.86V and the turn-on-time is 1.47ns.

• 한국정보통신설비학회:학술대회논문집
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• 2009.08a
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• pp.281-284
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• 2009

In this paper, we propose a method that applies Adaptive Frequency Sampling(AFS) technique to the equivalent circuit model for RF passive components. Thes days wireless communication system is getting smaller and smaller. So EMI/EMC is an issue in RF. We can solve PI(Power Integrity)/SI(Signal Integrity) that one of EMI/EMC problem apply IFFT for 3D EM simulation multiple with input signal. That is time comuming task. Therefore equivalent circuit model using RF passive component is important. AFS schemes are implemented to obtain the rational functions. S parameters of the equivalent circuit moldel is compared to those of EM simulation in case of the microstrip line structure.

• Journal of Advanced Navigation Technology
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• v.14 no.5
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• pp.655-660
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• 2010

This paper examines RF-to-DC conversion efficiency of rectifying circuit for wireless power transmission. The rectifying circuit consists of low pass filter, diode circuits and dc pass filter. All these components may be effect on the conversion efficiency. Using the simulation, we study these components how to effect on the conversion efficiency. On the basis of the simulation results, the 912MHz rectifying circuit with 50% efficiency at low input power such as 0dBm is fabricated and its characteristics are measured.

• Proceedings of the KIEE Conference
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• 1997.07b
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• pp.624-626
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• 1997

Canonical Chua's circuit is a simple electronic circuit which exhibits a variety of bifurcation phenomena and attractors. It consists of two capacitors, an inductor, two linear resistors, and a nonlinear resistor. When the circuit exhibits chaotic signals, the nonlinear resistor of canonical Chua's circuit may have three different voltage - current characteristics. In this paper, the design methodology for practical implementation of the nonlinear resistors which have all these characteristics is described. In addition, the effectiveness of result is shown by not only the MATLAB simulation but also the PSPICE simulation.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.68 no.1
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• pp.215-219
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• 2019

Development of DC interruption technology is being studied actively for enhanced DC grid reliability and stability. In this study, coil type superconductor DC circuit breaker was proposed as DC interruption. It is integration technology that combined current-limiting technique using superconductor and cut-off technique using mechanical DC circuit breaker. Superconductor was applied to the coil type. In simulation, Mayr arc model was applied to realize the arc characteristic in the mechanical DC circuit breaker. PSCAD/EMTDC had used to model and perform the simulation. To find out the protection range of coil type superconductor DCCB, the working operation have analyzed based on the rated voltage of DCCB. The results confirmed that, according to apply the limiting device, the protection range was increased in twice. Therefore, the probability of failure of interruption has lowered significantly.