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http://dx.doi.org/10.6109/jkiice.2020.24.7.885

Design of Counter Circuit for Improving Precision in Distance Measuring System  

Choi, Jin-Ho (Division of Embedded IT Engineering, Busan University of Foreign Studies)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.24, no.7, 2020 , pp. 885-890 More about this Journal
Abstract
In the distance measurement system the time-to-digital conversion circuit used measures the distance using the time interval between the start signal and the stop signal. The time interval is generally converted to digital information using a counter circuit considering the response speed. Therefore, a clock signal with a high frequency is required to improve precision, and a clock signal with a high frequency is also required to measure fine distances. In this paper, a counter circuit was designed to increase the accuracy of distance measurement while using the same frequency. The circuit design was performed using a 0.18㎛ CMOS process technology, and the operation of the designed circuit was confirmed through HSPICE simulation. As a result of the simulation, it is possible to obtain an improvement of four times the precision compared to the case of using a general counter circuit.
Keywords
precision; distance measurement; flip flop; current conveyor circuit;
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1 G. W. Roberts and M. Ali-Bakhshian, "A brief introduction to time-to-digital and digital-to-time converters," IEEE Trans. on Circuits and Systems II: Express Briefs, vol. 57, no. 3, pp. 153-157, March 2010.   DOI
2 S. Henzler, Time-to-Digital Converters, Heidelberg, Springer Netherlands, 2010.
3 J. Lee and Y. Moon, "The Design of a 0.15ps High Resolution Time-to-Digital Converter," Journal of Semiconductor Technology and Science, vol. 15, no. 3, pp. 334-341, June 2015.   DOI
4 S. Rana and K. Pal, "Current Conveyor Simulation Circuits Using Operational Amplifiers," Journal of Physical Sciences, vol. 11, pp. 124-132, 2007.
5 K. B. Maji, R. Kar, D. Mandal and S. P. Ghoshal, "Optimal Design of Low Voltage CMOS Second Generation Current Conveyor Using Hybrid Cuckoo Search and Particle Swarm Optimization Algorithm," in Proceeding of the 2017 Information Conference on Information Technology, Amman, pp. 246-251, Dec. 2017.
6 M. Brinson and V. Kuznetsov, "Current Conveyor EquationDefined Macromodels for Wideband RF Circuit Design," International Journal of Microelectronics and Computer Science, vol. 8, no. 2, pp. 65-71, 2017.
7 P. Kumar and K. Pal, "Universe Biquadratic Filter Using a Single Current Conveyor," Journal of Active and passive Electronics Devices, vol. 3, pp. 7-16, 2008.
8 T. Ettaghzouti, M. Bchir and N. Hassen, "High CMRR Voltage Mode Instrumentation Amplifier Using a New CMOS Differential Difference Current Conveyor Realization," International Journal of Electrical Engineering & Telecommunication, vol. 9, no. 3, pp. 132-141, May 2020.
9 Anurag, G. Singh and V. Sulochana, "Low Power Dual Edge-Triggered Static D Flip-Flop," International Journal of VLSI design & Communication Systems, vol.4, no.3, pp. 24-29, June 2013.
10 L. Ping, W. Ying and A. Piero, "A 2.2ps 2-D Gated Vernier Time-to-Digital Converter with Digital Calibration," IEEE Transaction. on Circuits and Systems II, pp.1019-1023, March 2016.