• 전력전자학회논문지
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• 제3권4호
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• pp.426-436
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• 1998

Identification of fault current during the operation of a power semiconductor switch and activation of suitable remedial actions are important for reliable operation of power converters. A short circuit is a basic and severe fault situation in a circuit structure such as voltage source converters. This paper presents a new active protection circuit for fast and precise clamping and safe shutdown of fault currents of the IGBTs. This circuit allows operation of the IGBTs with a higher on-state gate voltage, which can thereby reduce the conduction loss in the device without compromising the short circuit protection characteristics. The operation of the circuit is studied under various conditions, considering variation of temperature, rising rate of fault current, gate voltage value, and protection circuit parameters. An evaluation of the operation of the circuit is made using IGBTs from different to confirm the effectiveness of the protection circuit.

• 전력전자학회논문지
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• 제26권3호
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• pp.214-221
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• 2021

SiC MOSFETs require a faster and more reliable short-circuit protection circuit than conventional methods due to narrow short-circuit withstand times. Therefore, this research proposes a short-circuit protection circuit using a current-sensing circuit based on Rogowski coil. The method of designing the current-sensing circuit, which is a component of the proposed circuit, is presented first. The integrator and input/output filter that compose the current-sensing circuit are designed to have a wide bandwidth for accurately measuring short-circuit currents with high di/dt. The precision of the designed sensing circuit is verified on a double pulse test (DPT). In addition, the sensing accuracy according to the bandwidth of the filters and the number of turns of the Rogowski coil is analyzed. Next, the entire short-circuit protection circuit with the current-sensing circuit is designed in consideration of the fast short-circuit shutdown time. To verify the performance of this circuit, a short-circuit test is conducted for two cases of short-circuit conditions that can occur in the half-bridge structure. Finally, the short-circuit shutdown time is measured to confirm the suitability of the proposed protection circuit for the SiC MOSFET short-circuit protection.

• 한국전기전자재료학회논문지
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• 제27권11호
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• pp.686-689
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• 2014

Electrostatic discharge has been considered as a major reliability problem in the semiconductor industry. ESD reliability is an important issue for these products. Therefore, each I/O (Input/Output) PAD must be designed with a protection circuitry that creates a low impedance discharge path for ESD current. This paper presents a novel Lateral Insulated Gate Bipolar (LIGBT)-based ESD protection circuit with latch-up immunity and high robustness. The proposed circuit is fabricated by using 0.18 um BCD (bipolar-CMOS-DMOS) process. Also, TLP (transmission line pulse) I-V characteristic of proposed circuit is measured. In the result, the proposed ESD protection circuit has latch-up immunity and high robustness. These characteristics permit the proposed circuit to apply to power clamp circuit. Consequently, the proposed LIGBT-based ESD protection circuit with a latch-up immune characteristic can be applied to analog integrated circuits.

• ETRI Journal
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• 제38권2호
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• pp.272-279
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• 2016

In this paper, a new structure for an advanced high holding voltage silicon controlled rectifier (AHHVSCR) is proposed. The proposed new structure specifically for an AHHVSCR-based electrostatic discharge (ESD) protection circuit can protect integrated circuits from ESD stress. The new structure involves the insertion of a PMOS into an AHHVSCR so as to prevent a state of latch-up from occurring due to a low holding voltage. We use a TACD simulation to conduct a comparative analysis of three types of circuit - (i) an AHHVSCR-based ESD protection circuit having the proposed new structure (that is, a PMOS inserted into the AHHVSCR), (ii) a standard AHHVSCR-based ESD protection circuit, and (iii) a standard HHVSCR-based ESD protection circuit. A circuit having the proposed new structure is fabricated using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology. The fabricated circuit is also evaluated using Transmission-Line Pulse measurements to confirm its electrical characteristics, and human-body model and machine model tests are used to confirm its robustness. The fabricated circuit has a holding voltage of 18.78 V and a second breakdown current of more than 8 A.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2008년도 춘계학술대회 논문집
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• pp.133-135
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• 2008

In a design of ballast for discharge lamp, various kind of protection circuit are essential for safe operation. In this paper, overvoltage and current detection, no-load detection, lamp-fault detection, end of lamp detection for protection are introduced. Individual circuit operation and their function are described with the base that all circuit form is similar with overvoltage protection circuit.

• 전자공학회논문지A
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• 제31A권12호
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• pp.64-70
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• 1994

In this paper, we inverstigated how a parricular internal inverter circuit, which is located far from the input protection in CMOS DRAM, can be easily damaged by external ESD stress, while the protection circuit remains intact. It is shown in a mega bit DRAM that the internal circuit can be safe from ESD by simply improving the input protection circuit. An inverter, which consists of a relatively small NMOSFET and a very large PMOSFET, is used to speed up DRAMs, and the small NMOSFET is vulnerable to ESD in case that the discharge current beyond the protection flows through the inverter to Vss or Vcc power lines on chip. This internal circuit damage can not be detected by only measuring input leakage currents, but by comparing the standby and on operating current before and after ESD stressing. It was esperimentally proven that the placement of parasitic bipolar transistor between input pad and power supply is very effective for ESD immunity.

• 전기학회논문지
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• 제58권8호
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• pp.1538-1543
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• 2009

The electric ballast for ceramic metal halide lamp needs a protection circuit to prevent from over voltage and over current in the case that the lamp or the electric ballast are in faults. In this paper, cost-effective and high performance protection circuit is proposed for the electric ballast. The proposed protection circuit is adapted to the electric ballast with $LC_SC_P$ resonance type half bridge inverter. The experimental results demonstrate that the proposed circuit can protect effectively under open and short fault conditions.

• 전자공학회논문지A
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• 제29A권11호
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• pp.97-106
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• 1992

In integrated circuits, protection circuits are required to protect the internal nodes from the harmful ESD(Electrostatic discharge). This paper discusses the characteristics of the circuit components in ESD protection circuitry in order to analyze the ESD phenomina, and the design methodalogy of ESD protection circuits, using test pattern with a variation of the number of diode and transistor. The test devices are fabricated using a 0.8$\mu$m CMOS process. SPICE simulation was also carried out to relate output node voltage and measured ESD voltage. With increasing number of diodes and transistors in protection circuit, the ESD voltage also increases. The ESD voltage of the bi-directional circuit for both input and output was 100-300[V], which in higher than that of only output(uni-directional) circuit. In addition, the ESD protection circuit with the diode under the pad region was useful for the reduction of chip size and parasitic resistance. In this case, ESD voltage was improved to a value about 400[V].

• Journal of Power Electronics
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• 제10권6호
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• pp.777-783
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• 2010

In order to drive gas discharge lamps, DC-AC converters with a LCC resonant tank, whose output voltage is adjusted by a variable frequency control are frequently used. However, when they are activated by varying the operating frequency, converters are frequently damaged by unstable operation, due to the rising and falling of the operating frequency near the resonant frequency. To solve this problem, a simple protection circuit for the power supply of a gas discharge lamp is proposed in this paper. This circuit senses the primary current of the main transformer. Using this protection circuit, the operating frequency of the lamp driving inverter system is kept close to and on the right side of the resonant frequency and the inverter is always operated in the ZVS condition. The resulting stable variable frequency operation allows various gas discharge lamps to be tested without the risk of damaging the main switches, because the protection circuit can protect the power MOSFETs of bridge converters from abnormal conditions. The validity and effectiveness of the proposed protection circuit are verified through the experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권3호
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• pp.401-410
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• 2017

In this work, we show that the excessive lattice heating problem due to parasitic pnp transistor action in the diode electrostatic discharge (ESD) protection device in the diode input protection circuit, which is favorably used in CMOS RF ICs, can be solved by adopting a symmetrical cathode structure. To explain how the recipe works, we construct an equivalent circuit for input human-body model (HBM) test environment of a CMOS chip equipped with the diode protection circuit, and execute mixed-mode transient simulations utilizing a 2-dimensional device simulator. We attempt an in-depth comparison study by varying device structures to suggest valuable design guidelines in designing the protection diodes connected to the $V_{DD}$ and $V_{SS}$ buses. Even though this work is based on mixed-mode simulations utilizing device and circuit simulators, the analysis given in this work clearly explain the mechanism involved, which cannot be done by measurements.