• Title/Summary/Keyword: Chip control

Search Result 1,344, Processing Time 0.033 seconds

A Study on Gene Detection using Non-labeling DNA

  • Choi Yong-Sung;Lee Kyung-Sup;Kwon Young-Soo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.19 no.10
    • /
    • pp.960-965
    • /
    • 2006
  • This research aims to develop the multiple channel electrochemical DNA chip using microfabrication technology. At first, we fabricated a high integration type DNA chip array by lithography technology. Several probe DNAs consisting of thiol group at their 5-end were immobilized on the gold electrodes. Then target DNAs were hybridized and reacted. Cyclic voltammetry showed a difference between target DNA and control DNA in the anodic peak current values. Therefore, it is able to detect a plural genes electrochemically after immobilization of a plural probe DNA and hybridization of non-labeling target DNA on the electrodes simultaneously. It suggested that this DNA chip could recognize the sequence specific genes.

(The chip design for the cipher of the voice signal to use the SEED cipher algorithm) (SEED 암호 알고리즘을 적용한 음성 신호 암호화 칩 설계)

  • 안인수;최태섭;임승하;사공석진
    • Journal of the Institute of Electronics Engineers of Korea TE
    • /
    • v.39 no.1
    • /
    • pp.46-54
    • /
    • 2002
  • The world was opened by communication network because of fast improvement and diffusion of information communication. And information was effected in important factor that control economy improvement of the country. The country should improve the information security system because of necessity to maintain its information security independently. Therefore we have used the SEED cipher algorithm and designed the cipher chip of the voice band signal using the Xilinx Co. XCV300PQ240 chip. At the result we designed the voice signal cipher chip of the maximum frequency 47.895MHz and the total equivalent gate 27,285.

Forecasting technics for variable frequency control of PWM inverter using one-chip $\mu$-com (One-chip $\mu$-com을 이용한 PWM 인버터의 가변 주파수 제어 추정 기법)

  • Park, Jung-Gyun;Kim, Hyun;Choi, Hyun-Young;Yeo, Duk-Gu;Oh, Se-Ho;Kim, Yang-Mo
    • Proceedings of the KIEE Conference
    • /
    • 2001.07b
    • /
    • pp.1055-1057
    • /
    • 2001
  • The switching circuit of PWM inverter is very complicated. By using one-chip $\mu$-com the complication of switching circuit is possible to be diminished. But because in one-chip $\mu$-com the limitation of processed memory size exists, the switching handling method has to be simple. In this paper, to effectively utilize the switching handling, we presented the estimation method of PWM pulses which is different form the conventional PWM switching method by the comparison.

  • PDF

Chip Load Control Using A NC Verification Model Based on Z-Map (Z-map 기반 NC 검증모델을 이용한 칩부하 제어)

  • 백대균;고태조;김희술
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2000.11a
    • /
    • pp.801-805
    • /
    • 2000
  • This paper presents a new method of tool path optimization. A NC verification model based Z-map was utilized to obtain chip load in feed per tooth. This developed software can regenerate a NC program from cutting condition and the NC program that was generated in CAM. The regenerated NC program has not only all same data of the ex-NC program but also the new feed rates in every block. The new NC data can reduce the cutting time and manufacture precision dies with the same chip load in feed per tooth. This method can also prevent tool chipping and make constant tool wear. This paper considered the effects of acceleration and deceleration in feed rate change.

  • PDF

The Research of System-On-Chip Design for Railway Signal System (철도신호를 위한 단일칩 개발에 관한 연구)

  • Park, Joo-Yul;Kim, Hyo-Sang;Lee, Joon-Hwan;Kim, Bong-Taek;Chung, Ki-Seok
    • Proceedings of the KSR Conference
    • /
    • 2008.06a
    • /
    • pp.572-578
    • /
    • 2008
  • As the railway transportation is getting faster and its operation speed has increased rapidly, its signal control has been complicated. For real time signal processing it is very important to prohibit any critical error from causing the system to malfunction. Therefore, handling complicated signals effectively while maintaining fault-tolerance capability is highly expected in modern railway transportation industry. In this paper, we suggest an SoC (Sytem-on-Chip) design method to integrate these complicated signal controlling mechanism with fault tolerant capability in a single chip. We propose an SoC solution which contains a high performance 32-bit embedded processor, digital filters and a PWM unit inside a single chip to implement ATO's, ATC's, ATP's and ATS's digital signal-processing units. We achieve an enhanced reliability against the calculation error by adding fault tolerance features to ensure the stability of each module.

  • PDF

Performance improvement of single chip multiprocessor using concurrent branch execution (분기 동시 수행을 이용한 단일 칩 멀티프로세서의 성능 향상 기법)

  • Lee, Seung-Ryul;Jung, Jin-Ha;Choi, Jae-Hyeok;Choi, Sang-Bang
    • Proceedings of the IEEK Conference
    • /
    • 2006.06a
    • /
    • pp.723-724
    • /
    • 2006
  • Exploiting the instruction level parallelism encountered with the limit. Single chip multiprocessor was introduced to overcome the limit of traditional processor using the instruction level parallelism. Also, a branch miss prediction is one of the causes that reduce the processor performance. In order to overcome the problems, in this paper, we make single chip multiprocessor having the idle core execute the two control flow of conditional branch. This scheme is a kind of multi-path execution technique based on single chip multiprocessor architecture.

  • PDF

1Kbit single-poly EEPROM IC design (1Kbit single-poly EEPROM IC 설계)

  • Jung, In-Seok;Park, Keun-Hyung;Kim, Kuk-Hwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.06a
    • /
    • pp.249-250
    • /
    • 2008
  • In this paper, we propose the single polycrystalline silicon flash EEPROM IC with a new structure which does not need the high voltage switching circuit. The design of high voltage switching circuits which are needed for the data program and erase, has been an obstacle to develop the single-poly EEPROM. Therefore, we has proposed the new cell structure which uses the low voltage switching circuits and has designed the full chip. A new single-poly EEPROM cell is designed and the full chip including the control block, the analog block, row decoder block, and the datapath block is designed. And the each block is verified by using the computer simulation. In addition, the full chip layout is performed.

  • PDF

Fabrication of one chip smell recognition system (원칩형 냄새 인식시스템 구현)

  • 장으뜸;정완영;서용수
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2000.11a
    • /
    • pp.602-605
    • /
    • 2000
  • Recently, a study of intellectual smell recognition system is applied for the various fields such as control of food processing and survey of decay. A basic gas recognition system was implemented gases using four metal oxides semiconductor sensors as inputs. A CPLD chip of twenty thousand gates level was used for this purpose. The CPLD chip was designed and the availability of the one chip smell recognition system was tested.

  • PDF

Eletrochemical Detection of Gene using Microelectrode-array DNA Chip (미소전극어레이형 DNA칩을 이용한 유전자의 전기화학적 검출)

  • ;;Eiichi Tamiya
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.17 no.7
    • /
    • pp.729-737
    • /
    • 2004
  • In this paper, a DNA chip with a microelectrode array was fabricated using microfabrication technology. Several probe DNAs consisting of mercaptohexyl moiety at their 5 end were immobilized on the gold electrodes by DNA arrayer. Then target DNAs were hybridized and reacted with Hoechst 33258, which is a DNA minor groove binder and electrochemically active dye. Linear sweep voltammetry or cyclic voltammetry showed a difference between target DNA and control DNA in the anodic peak current values. It was derived from Hoechst 33258 concentrated at the electrode surface through association with formed hybrid. It suggested that this DNA chip could recognize the sequence specific genes.

Neurons-on-a-Chip: In Vitro NeuroTools

  • Hong, Nari;Nam, Yoonkey
    • Molecules and Cells
    • /
    • v.45 no.2
    • /
    • pp.76-83
    • /
    • 2022
  • Neurons-on-a-Chip technology has been developed to provide diverse in vitro neuro-tools to study neuritogenesis, synaptogensis, axon guidance, and network dynamics. The two core enabling technologies are soft-lithography and microelectrode array technology. Soft lithography technology made it possible to fabricate microstamps and microfluidic channel devices with a simple replica molding method in a biological laboratory and innovatively reduced the turn-around time from assay design to chip fabrication, facilitating various experimental designs. To control nerve cell behaviors at the single cell level via chemical cues, surface biofunctionalization methods and micropatterning techniques were developed. Microelectrode chip technology, which provides a functional readout by measuring the electrophysiological signals from individual neurons, has become a popular platform to investigate neural information processing in networks. Due to these key advances, it is possible to study the relationship between the network structure and functions, and they have opened a new era of neurobiology and will become standard tools in the near future.