• Title/Summary/Keyword: Charge trap

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Photoluminescence Behavior of $Al^{3+}$, $Pr^{3+}$ Doped Perovskite-type $La_{2/3}TiO_{3}and Pyrochlore-type $La_{2}Ti_{2}O_{7}$ ($Al^{3+}$, $Pr^{3+}$가 첨가된 Perovskite $La_{2/3}TiO_{3}와 Pyrochlore $La_{2}Ti_{2}O_{7}$의 발광 특성)

  • Park, Sang-Mi;Park, Joung-Kyu;Kim, Chang-Hae;Park, Hee-Dong;Jang, Ho-Gyeom
    • Journal of the Korean Ceramic Society
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    • v.38 no.9
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    • pp.806-810
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    • 2001
  • $La_{2/3}TiO_3$, $La_2Ti_2O_7$ are used in various parts by dielectric properties. The purpose of the present study is to understand the photoluminescence properties of $Al^{3+}\;and\;Pr^{3+}$ doped perovskite-type $La_{2/3}TiO_3$ and pyrochlore-type $La_2Ti_2O_7$ phosphor, which characterized by the red emission $(^1D_2{\rightarrow}^3H_4)\;of\;Pr^{3+}$ of $Pr^{3+}$ ion. The explanation for the energy transfer and the corresponding critical distance were proposed on the role of Al^3+ ions as energy transfer mediates in perovskite-type $La_{2/3}TiO_3$:Pr phosphor. In order to clarify the distinction of photoluminescence propoerties between the perovskite-type $La_{2/3}TiO_3$ and the pyrochlore $La_2Ti_2O_7$, the trap-involved process and the charge transfer band have been investigated.

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Analysis of Positive Bias Temperature Instability Characteristic for Nano-scale NMOSFETs with La-incorporated High-k/metal Gate Stacks (La이 혼입된 고유전체/메탈 게이트가 적용된 나노 스케일 NMOSFET에서의 PBTI 신뢰성의 특성 분석)

  • Kwon, Hyuk-Min;Han, In-Shik;Park, Sang-Uk;Bok, Jung-Deuk;Jung, Yi-Jung;Kwak, Ho-Young;Kwon, Sung-Kyu;Jang, Jae-Hyung;Go, Sung-Yong;Lee, Weon-Mook;Lee, Hi-Deok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.3
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    • pp.182-187
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    • 2011
  • In this paper, PBTI characteristics of NMOSFETs with La incorporated HfSiON and HfON are compared in detail. The charge trapping model shows that threshold voltage shift (${\Delta}V_{\mathrm{T}}$) of NMOSFETs with HfLaON is greater than that of HfLaSiON. PBTI lifetime of HfLaSiON is also greater than that of HfLaON by about 2~3 orders of magnitude. Therefore, high charge trapping rate of HfLaON can be explained by higher trap density than HfLaSiON. The different de-trapping behavior under recovery stress can be explained by the stable energy for U-trap model, which is related to trap energy level at zero electric field in high-k dielectric. The trap energy level of two devices at zero electric field, which is extracted using Frenkel-poole emission model, is 1,658 eV for HfLaSiON and 1,730 eV for HfLaON, respectively. Moreover, the optical phonon energy of HfLaON extracted from the thermally activated gate current is greater than that of HfLaSiON.

Comparative investigation of endurance and bias temperature instability characteristics in metal-Al2O3-nitride-oxide-semiconductor (MANOS) and semiconductor-oxide-nitride-oxide-semiconductor (SONOS) charge trap flash memory

  • Kim, Dae Hwan;Park, Sungwook;Seo, Yujeong;Kim, Tae Geun;Kim, Dong Myong;Cho, Il Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.4
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    • pp.449-457
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    • 2012
  • The program/erase (P/E) cyclic endurances including bias temperature instability (BTI) behaviors of Metal-$Al_2O_3$-Nitride-Oxide-Semiconductor (MANOS) memories are investigated in comparison with those of Semiconductor-Oxide-Nitride-Oxide-Semiconductor (SONOS) memories. In terms of BTI behaviors, the SONOS power-law exponent n is ~0.3 independent of the P/E cycle and the temperature in the case of programmed cell, and 0.36~0.66 sensitive to the temperature in case of erased cell. Physical mechanisms are observed with thermally activated $h^*$ diffusion-induced Si/$SiO_2$ interface trap ($N_{IT}$) curing and Poole-Frenkel emission of holes trapped in border trap in the bottom oxide ($N_{OT}$). In terms of the BTI behavior in MANOS memory cells, the power-law exponent is n=0.4~0.9 in the programmed cell and n=0.65~1.2 in the erased cell, which means that the power law is strong function of the number of P/E cycles, not of the temperature. Related mechanism is can be explained by the competition between the cycle-induced degradation of P/E efficiency and the temperature-controlled $h^*$ diffusion followed by $N_{IT}$ passivation.

Improving Charge Injection Characteristics and Electrical Performances of Polymer Field-Effect Transistors by Selective Surface Energy Control of Electrode-Contacted Substrate (전극 접촉영역의 선택적 표면처리를 통한 유기박막트랜지스터 전하주입특성 및 소자 성능 향상에 대한 연구)

  • Choi, Giheon;Lee, Hwa Sung
    • Journal of Adhesion and Interface
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    • v.21 no.3
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    • pp.86-92
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    • 2020
  • We confirmed the effects on the device performances and the charge injection characteristics of organic field-effect transistor (OFET) by selectively differently controlling the surface energies on the contact region of the substrate where the source/drain electrodes are located and the channel region between the two electrodes. When the surface energies of the channel and contact regions were kept low and increased, respectively, the field-effect mobility of the OFET devices was 0.063 ㎠/V·s, the contact resistance was 132.2 kΩ·cm, and the subthreshold swing was 0.6 V/dec. They are the results of twice and 30 times improvements compared to the pristine FET device, respectively. As the results of analyzing the interfacial trap density according to the channel length, a major reason of the improved device performances could be anticipated that the pi-pi overlapping direction of polymer semiconductor molecules and the charge injection pathway from electrode is coincided by selective surface treatment in the contact region, which finally induces the decreases of the charge trap density in the polymer semiconducting film. The selective surface treatment method for the contact region between the electrode and the polymer semiconductor used in this study has the potential to maximize the electrical performances of organic electronics by being utilized with various existing processes to lower the interface resistance.

The Analysis of Retention Characteristic according to Remnant Polarization(Pr) and Saturated Polarization(Ps) in 3D NAND Flash Memory (3D NAND Flash Memory의 Remnant Polarization(Pr)과 Saturated Polarization(Ps)에 따른 Retention 특성 분석)

  • Lee, Jaewoo;Kang, Myounggon
    • Journal of IKEEE
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    • v.26 no.2
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    • pp.329-332
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    • 2022
  • In this paper, retention characteristics of lateral charge migration according to parameters of 3D NAND flash memory to which ferroelectric (HfO2) structure is applied and ∆Vth were analyzed. The larger the Ps, the greater maximum polarization possible in ferroelectric during Programming. Therefore, the initial Vth increases by about 1.04V difference at Ps 70µC/cm2 than at Ps 25µC/cm2. Also, electrons trapped after the Program operation causes lateral charge migration over time. Since ferroelectric maintains polarization without applying voltage to the gate after Programming, regardless of Ps value, polarization increases as Pr increases and the ∆Vth due to lateral charge migration becomes smaller by about 1.54V difference at Pr 50µC/cm2 than Pr 5µC/cm2.

Effects of re-stress after anneal on oxide leakage (열처리 후 가해진 스트레스가 산화막 누설전류에 미치는 영향)

  • 이재호;김병일
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.593-596
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    • 1998
  • Effects of current re-stress after anneal on leakage current and trapped charges in oxides are investigated. Current stress on 6 nm thick oxide has generated mostly positive traps within the oxide resulting in leakage currents. The interface states generated are several orders of magnitude smaller, determined by C-V and charge pumping method. Annealing has eliminated only the charged traps not the neutral traps, thus the leakage current and trap density are increased when the oxides are re-stressed.

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Resistive Switching Characteristics of Amorphous GeSe ReRAM without Metalic Filaments Conduction

  • Nam, Gi-Hyeon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.368.1-368.1
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    • 2014
  • We proposed amorphous GeSe-based ReRAM device of metal-insulator-metal (M-I-M) structure. The operation characteristics of memory device occured unipolar switching characteristics. By introducing the concepts of valance-alternation-pairs (VAPs) and chalcogen vacancies, the unipolar resistive switching operation had been explained. In addition, the current transport behavior were analyzed with space charge effect of VAPs, Schottky emission in metal/GeSe interface and P-F emission by GeSe bulk trap in mind. The GeSe ReRAM device of M-I-M structure indicated the stable memory switching characteristics. Furthermore, excellent stability, endurance and retention characteristics were also verified.

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