• Journal of the Institute of Electronics and Information Engineers
• /
• v.54 no.2
• /
• pp.133-138
• /
• 2017

This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The signal through a small RC time constant circuit has almost same loop filter output voltage. The signal through a large RC time constant circuit has the average value of loop filter output voltage and does as a role of reference voltage to the comparator. The output of the comparator controls the sub-charge pump which provide a current to LPF. When the loop filter output voltage increases, the sub-charge pump discharges the loop filter and decreases loop filter output voltage. When the loop filter output voltage decreases, the sub-charge pump charges the loop filter and increases loop filter output voltage. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.26 no.8
• /
• pp.1-7
• /
• 2012

In this paper, a new LED driving circuit which is able to control dimming of LED is proposed using charge pump. The proposed LED driving circuit steps down the input voltage to operate LED without DC-DC converter. The operation of this driving circuit is verified by P-Spice simulation, and the characteristics of the driving circuit is measured and evaluated in the experiments. As a result, the driving circuit efficiency of 88.5[%] is obtained when all LEDs are turned on by digital control method at the highest dimming level(255/255).

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.16 no.8
• /
• pp.1741-1746
• /
• 2012

This paper introduces a new DC-DC voltage multiplier using a Dickson's charge pump and a modified voltage doubler. The voltage obtained from a conventional Dickson's chrage pump was reused for accelerating the voltage multiplication and the architecture of the proposed voltage multiplier would not decrease the device reliability of DMOS. The proposed 6-stage voltage multiplier generates about 33V with 3V voltage source. To evaluate the proposed voltage multiplier, simulations were performed with Magna DMOS technology. The simulated voltage multiplication agrees well with a theoretical value, therefore, this paper introduces a new fast voltage multiplier with minimum devices.

• Journal of Power Electronics
• /
• v.16 no.3
• /
• pp.1209-1217
• /
• 2016

This paper presents a novel charge pump scheme that combines the advantages of Fibonacci and Dickson charge pumps to obtain 30 V voltage for display driver integrated circuit application. This design only requires four external capacitors, which is suitable for a small-package application, such as smart card displays. High-amplitude (<6.6 V) clocks are produced to enhance the gate drive of a Dickson charge pump and improve the system's current drivability by using a voltage-doubler charge pump with a pulse skip regulator. This regulation engages many middle-voltage devices, and approximately 30% of chip size is saved. Further optimization of flying capacitors tends to decrease the total chip size by 2.1%. A precise and simple model for a one-stage Fibonacci charge pump with current load is also proposed for further efficiency optimization. In a practical design, its voltage error is within 0.12% for 1 mA of current load, and it maintains a 2.83% error even for 10 mA of current load. This charge pump is fabricated through a 0.11 μm 1.5 V/6 V/32 V process, and two regulators, namely, a pulse skip one and a linear one, are operated to maintain the output of the charge pump at 30 V. The performances of the two regulators in terms of ripple, efficiency, line regulation, and load regulation are investigated.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.10 no.7
• /
• pp.1266-1274
• /
• 2006

A non-overlap boosted-clock charge pump(NBCCP) with internal pumping capacitor, an advantageous circuit from a minimizing point of TFT-LCD driver IC module, is proposed in this paper. By using the non-overlap boosted-clock swinging in 2VDC voltage, the number of pumping stages is reduced to half and a back current of pumping charge from charge pumping node to input stage is also prevented compared with conventional cross-coupled charge pump with internal pumping capacitor. As a result, pumping current of the proposed NBCCP circuit is increased more than conventional cross-coupled charge pump, and a layout area is decreased. A proposed DC-DC converter for TFT-LCD driver IC is designed with $0.18{\mu}m$ triple-well CMOS process and a test chip is in the marking.

• Proceedings of the IEEK Conference
• /
• 2002.07a
• /
• pp.369-372
• /
• 2002

To remedy both the degradation and saturation of the output voltages in the modified Dickson pump, a new multistage charge pump circuit is presented in this paper. Here using PMOS charge-transfer switches instead of NMOS ones eliminates the necessity of diode-configured output stage in the modified-Dickson pump, achieving the improved voltage pumping gain and its output voltages proportional to the stage numbers. Measurement indicates that VOUT/3VDD of this new pump circuit with two stages reaches to a value as high as 0.94V even with low VDD=1.0 V, strongly addressing that this scheme is very favorable at low-voltage memory applications.

• Journal of Sensor Science and Technology
• /
• v.21 no.1
• /
• pp.7-12
• /
• 2012

In this paper, we propose a 4-transistor active pixel sensor(APS) with a novel correlated double sampling(CDS) circuit for the purpose of extending dynamic range. Dual sampling techniques can overcome low-sensitivity and temporal disparity problems at low illumination. To accomplish this, two images are obtained at the same time using different sensitivities. The novel CDS circuit proposed in this paper contains MOS switches that make it possible for the capacitance of a conventional CDS circuit to function as a charge pump, so that the proposed APS exhibits an extended dynamic range as well as reduced noise. The designed circuit was fabricated by using $0.35{\mu}m$ 2-poly 4-metal standard CMOS technology and its characteristics have been evaluated.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.07a
• /
• pp.271-274
• /
• 2001

In this paper, we propose a charge pump phase-locked loop (PLL) with multi-PFD which is composed of a sequential phase frequency detector(PFD) and a precharge PFD. When the Phase difference is within - $\pi$ ∼ $\pi$ , operation frequency can be increased by using precharge PFD. When the phase difference is larger than │ $\pi$ │, acquisition time can be shorten by the additional control circuit with increased charge pump current. Therefore a high frequency operation, a fast acquisition and an unlimited error detection range can be achieved.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.27 no.9
• /
• pp.15-22
• /
• 2013

A new LED lamp driving technology with a charge pump instead of a conventional DC-DC converter is proposed. The proposed driving technology is used to control the LED lamp with digital dimming. The power loss in the zener diodes is reduced because the charging process of the capacitors is selectively controlled according to the digital control signal. From the experimental results, when dimming four LED lamps simultaneously, the average driving circuit efficiency of 89% is obtained, regardless of the dimming level. White light with color temperature over a range of 2800~7200K was produced by dimming control of red, green, blue and amber LED lamps with the proposed driving circuit. The characteristics of the driving circuits can be changed depending on the characteristics of the R, G, B, and A LED lamps. The efficiency of the driving circuits up to a maximum 89% can also be obtained depending on the combination of LED lamps. The driving technology with digital dimming control for LED lamps proposed in this paper would be effective for obtaining high efficiency in LED driving circuits and remote control of LED lamps using digital communications.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.13 no.5
• /
• pp.359-369
• /
• 2020

In this paper, we proposed a charge pump (CP) circuit that has a wide operating range while reducing the current mismatch for the PLL that generates the main clock of the CMOS X-Ray detector. The operating range and current mismatch of the CP circuit are determined by the characteristics of the current source circuit for the CP circuit. The proposed CP circuit is implemented with a wide operating current mirror bias circuit to secure a wide operating range and a cascode structure with a large output resistance to reduce current mismatch. The proposed wide operating range cascode CP circuit was fabricated as a chip using a 350nm CMOS process, and current matching characteristics were measured using a source measurement unit. At this time, the power supply voltage was 3.3 V and the CP circuit current ICP = 100 ㎂. The operating range of the proposed CP circuit is △VO_Swing=2.7V, and the maximum current mismatch is 5.15 % and the maximum current deviation is 2.64 %. The proposed CP circuit has low current mismatch characteristics and can cope with a wide frequency range, so it can be applied to systems requiring various clock speed.