• Title/Summary/Keyword: BJT (Bipolar Junction Transistor)

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A Study on Destruction Characteristics of BJT (Bipolar Junction Transistor) at Different Pulse Repetition Rate (다양한 펄스 반복률에서의 NPN BJT (Bipolar Junction Transistor)의 파괴 특성에 관한 연구)

  • Bang, Jeong-Ju;Huh, Chang-Su;Lee, Jong-Won
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.3
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    • pp.167-171
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    • 2014
  • This paper examines the destruction behavior of NPN BJT (bipolar junction transistor) by repetition pulse. The injected pulse has a rise time of 1 ns and the maximum peak voltage of 2 kV. Pulse was injected into the base of transistor. Transistor was destroyed, current flows even when the base power is turned off. Cause the destruction of the transistor is damaged by heat. Breakdown voltage of the transistor is 975 V at single pulse, and repetition pulse is 525~575 V. Pulse repetition rate increases, the DT (destruction threshold) is reduced. Pulse Repetition rate is high, level of transistor destruction is more serious.

An Experimental Study on the Low Noise Property of the Bipolar Junction Transistor Fabricated by HCI Gettering (HCI Gettering Oxidation을 이용한 BJT의 저잡음화에 관한 실험적 연구)

  • 최세곤;서희돈
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.1
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    • pp.7-12
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    • 1984
  • In this paper, the authors applied the method of hydrogen chloride gettering oxidation to fabricate the low noise bipolar transistor. The results of measurements of the effect of guttering on the variation of flicker noise spectral intensity for variable HCI concentrations indicate that flicker noise in bipolar than-sistor is dependent on the surface condition and that the gettering in a mixture of 2% HCI in oxidation produced the optimal results in the fabrication of the low noise device. In addition, it was also noted that the PSG layer formed by the emitter source (phosphorus) did not have so much guttering effect as in the process with HCl getterinng.

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A Design of BJT-based ESD Protection Device combining SCR for High Voltage Power Clamps

  • Jung, Jin-Woo;Koo, Yong-Seo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.3
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    • pp.339-344
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    • 2014
  • This paper presents a novel bipolar junction transistor (BJT) based electrostatic discharge (ESD) protection device. This protection device was designed for 20V power clamps and fabricated by a process with Bipolar-CMOS-DMOS (BCD) $0.18{\mu}m$. The current-voltage characteristics of this protection device was verified by the transmission line pulse (TLP) system and the DC BV characteristic was verified by using a semiconductor parameter analyzer. From the experimental results, the proposed device has a trigger voltage of 29.1V, holding voltage of 22.4V and low on-resistance of approximately $1.6{\Omega}$. In addition, the test of ESD robustness showed that the ESD successfully passed through human body model (HBM) 8kV. In this paper, the operational mechanism of this protection device was investigated by structural analysis of the proposed device. In addition, the proposed device were obtained as stack structures and verified.

A Study on the Method of the Analysis of the Base Gummel Number of the BJT for Integrated Circuits (직접회로용 BJT의 베이스 Gummel Number 해석 방법에 관한 연구)

  • 이은구;김철성
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.52 no.2
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    • pp.74-79
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    • 2003
  • The method of the analysis of the base Gummel number of the BJT(Bipolar Junction Transistor) for integrated circuits based upon the semiconductor physics is proposed and the method of calculating the doping profile of the base region using process conditions is presented. The transistor saturation current obtained from the proposed method of NPN BJT using 20V and 30V process shows an averaged relative error of 6.7% compared with the measured data and the transistor saturation current of PNP BJT shows an averaged relative error of 9.2% compared with the measured data

Memory window characteristics of vertical nanowire MOSFET with asymmetric source/drain for 1T-DRAM application (비대칭 소스/드레인 수직형 나노와이어 MOSFET의 1T-DRAM 응용을 위한 메모리 윈도우 특성)

  • Lee, Jae Hoon;Park, Jong Tae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.4
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    • pp.793-798
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    • 2016
  • In this work, the memory window characteristics of vertical nanowire device with asymmetric source and drain was analyzed using bipolar junction transistor mode for 1T-DRAM application. A gate-all-around (GAA) MOSFET with higher doping concentration in the drain region than in the source region was used. The shape of GAA MOSFET was a tapered vertical structure that the source area is larger than the drain area. From hysteresis curves using bipolar junction mode, the memory windows were 1.08V in the forward mode and 0.16V in the reverse mode, respectively. We observed that the latch-up point was larger in the forward mode than in the reverse mode by 0.34V. To confirm the measurement results, the device simulation has been performed and the simulation results were consistent in the measurement ones. We knew that the device structure with higher doping concentration in the drain region was desirable for the 1T-DRAM using bipolar junction mode.

Effects of Fast Neutron Irradiation on Switching of Silicon Bipolar Junction Transistor

  • Sung Ho Ahn;Gwang Min Sun
    • Journal of Radiation Protection and Research
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    • v.48 no.3
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    • pp.124-130
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    • 2023
  • Background: When bipolar junction transistors (BJTs) are used as switches, their switching characteristics can be deteriorated because the recombination time of the minority carriers is long during turn-off transient. When BJTs operate as low frequency switches, the power dissipation in the on-state is large. However, when BJTs operate as high frequency switches, the power dissipation during switching transients increases rapidly. Materials and Methods: When silicon (Si) BJTs are irradiated by fast neutrons, defects occur in the Si bulk, shortening the lifetime of the minority carriers. Fast neutron irradiation mainly creates displacement damage in the Si bulk rather than a total ionization dose effect. Defects caused by fast neutron irradiation shorten the lifetime of minority carriers of BJTs. Furthermore, these defects change the switching characteristics of BJTs. Results and Discussion: In this study, experimental results on the switching characteristics of a pnp Si BJT before and after fast neutron irradiation are presented. The results show that the switching characteristics are improved by fast neutron irradiation, but power dissipation in the on-state is large when the fast neutrons are irradiated excessively. Conclusion: The switching characteristics of a pnp Si BJT were improved by fast neutron irradiation.

Turn-off time improvement by fast neutron irradiation on pnp Si Bipolar Junction Transistor

  • Ahn, Sung Ho;Sun, Gwang Min;Baek, Hani
    • Nuclear Engineering and Technology
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    • v.54 no.2
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    • pp.501-506
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    • 2022
  • Long turn-off time limits high frequency operation of Bipolar Junction Transistors (BJTs). Turn-off time decreases with increases in the recombination rate of minority carriers at switching transients. Fast neutron irradiation on a Si BJT incurs lattice damages owing to the displacement of silicon atoms. The lattice damages increase the recombination rate of injected holes with electrons, and decrease the hole lifetime in the base region of pnp Si BJT. Fast neutrons generated from a beryllium target with 30 MeV protons by an MC-50 cyclotron were irradiated onto pnp Si BJTs in experiment. The experimental results show that the turn-off time, including the storage time and fall time, decreases with increases in fast neutron fluence. Additionally, it is confirmed that the base current increases, and the collector current and base-to-collector current amplification ratio decrease due to fast neutron irradiation.

High Current Behavior and Double Snapback Mechanism Analysis of Gate Grounded Extended Drain NMOS Device for ESD Protection Device Application of DDIC Chip (DDIC 칩의 정전기 보호 소자로 적용되는 GG_EDNMOS 소자의 고전류 특성 및 더블 스냅백 메커니즘 분석)

  • Yang, Jun-Won;Kim, Hyung-Ho;Seo, Yong-Jin
    • Journal of Satellite, Information and Communications
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    • v.8 no.2
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    • pp.36-43
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    • 2013
  • In this study, the high current behaviors and double snapback mechanism of gate grounded_extended drain n-type MOSFET(GG_EDNMOS) device were analyzed in order to realize the robust electrostatic discharge(ESD) protection performances of high voltage operating display driver IC(DDIC) chips. Both the transmission line pulse(TLP) data and the thermal incorporated 2-dimensional simulation analysis as a function of ion implant conditions demonstrate a characteristic double snapback phenomenon after triggering of bipolar junction transistor(BJT) operation. Also, the background carrier density is proven to be a critical factor to affect the high current behavior of the GG_EDNMOS devices.

The Effects of ${\gamma}-rays$ on Power Devices

  • Lho, Young-Hwan;Kim, Ki-Yup;Cho, Kyoung-Y.
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.2287-2290
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    • 2003
  • The electrical characteristics of power devices such as BJT (Bipolar Junction Transistor), and MOSFET (Metal Oxide Field Effect Transistor), etc, are altered due to impinging photon radiation and temperature in the nuclear or the space environment. In this paper, BJT and MOSFET are the two devices subjected to ${\gamma}$ radiation. In the case of BJT, the current gain (${\beta}$) and the collector to Emiter breakdown voltage ($V_{CEO}$) are the two main parameters considered. When it was subjected to ${\gamma}$ rays, the ${\beta}$ decreases as the dose level increases, whereas, $V_{CEO}$ gradually increases as the dose level increases. In the case of MOSFET, the threshold voltage is decreasing as the dose level increases. Here it has been observed the decent rate is an increasing function of the threshold voltage. The on-resistance does not change with respect to the dose. Both the devices recover back the original specification after the annealing is finished. No permanent damage has been occurred.

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A study on the method of the calculation of the base Gummel number of the PNP BJT for integrated circuits (집적회로용 PNP BJT의 베이스 Gummel Number 계산 방법에 관한 연구)

  • Lee, Eun-Gu;Lee, Dong-Ryul;Kim, Tae-Han;Kim, Cheol-Seong
    • Proceedings of the KIEE Conference
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    • 2002.11a
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    • pp.141-144
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    • 2002
  • The method of the analysis of the base Gummel number of the PNP BJT(Bipolar Junction Transistor) for integrated circuits based upon the semiconductor physics is proposed and the method of calculating the doping profile of the base region using process conditions is presented. The transistor saturation current obtained from the proposed method of PNP BJT using 20V and 30V process shows an averaged relative error of 6.7% compared with the measured data.

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