• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.266-269
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• 2012

High-efficiency built-in redundancy analysis (BIRA) is presented. The proposed BIRA uses three techniques to achieve a high repair rate using spare mapping registers with adjustable fault tags to reduce area overhead. Simulation results show that the proposed BIRA is a reasonable solution for embedded memories.

• ETRI Journal
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• v.31 no.3
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• pp.339-341
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• 2009

Built-in redundancy analysis (BIRA) is widely used to enhance the yield of embedded memories. In this letter, a new BIRA method for both high repair efficiency and small hardware overhead is presented. The proposed method performs redundancy analysis operations using the spare mapping registers with a covered fault list. Experimental results demonstrate the superiority of the proposed method compared to previous works.

• ETRI Journal
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• v.32 no.4
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• pp.642-644
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• 2010

With the rapid increase occurring in both the capacity and density of memory products, test and repair issues have become highly challenging. Memory repair is an effective and essential methodology for improving memory yield. An SoC utilizes built-in redundancy analysis (BIRA) with built-in self-test for improving memory yield and reliability. This letter proposes a new heuristic algorithm and new hardware architecture for the BIRA scheme. Experimental results indicate that the proposed algorithm shows near-optimal repair efficiency in combination with low area and time overheads.

• KIPS Transactions on Computer and Communication Systems
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• v.3 no.5
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• pp.129-140
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• 2014

BIST(Built-in self test) is to detect various faults of the existing memory and BIRA(Built-in redundancy analysis) is to repair detected faults by allotting spare. Also, BISR(Built-in self repair) which integrates BIST with BIRA, can enhance the whole memory's yield. However, the previous methods were suggested for RAM and are difficult to diagnose disturbance that is NAND-type flash memory's intrinsic fault when used for the NAND-type flash memory with different characteristics from RAM's memory structure. Therefore, this paper suggests a BISD(Built-in self diagnosis) to detect disturbance occurring in the NAND-type flash memory and to diagnose the location of fault, and BISR to repair faulty blocks.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.30-36
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• 2010

In recent memories, repair is an unavoidable method to maintain its yield and quality. Although many word oriented memories as well as embedded memories in system-on-chip (SOC) consists of multiple local memory blocks with a global spare architecture, most of previous studies on built-in redundancy analysis (BIRA) algorithms have focused on single memory block with a local spare architecture. In this paper, a new BIRA algorithm for multiple blocks with a global spare architecture is proposed. The proposed BIRA is basd on CRESTA which is able to achieve optimal repair rate with almost zero analysis time. In the proposed BIRA, all repair solutions for local memory blocks are analyzed by local analyzers which belong to each local memory block and then compared sequentially and judged whether each solution can meet the limitation of the global spare architecture or not. Experimental results show that the proposed BIRA achieves much faster analysis speed compared to previous BIRAs with an optimal repair rate.

• ETRI Journal
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• v.32 no.4
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• pp.638-641
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• 2010

With the growth of memory capacity and density, memory testing and repair with the goal of yield improvement have become more important. Therefore, the development of high efficiency redundancy analysis algorithms is essential to improve yield rate. In this letter, we propose an improved built-in redundancy analysis (BIRA) algorithm with a minimized binary search tree made by simple calculations. The tree is constructed until finding a solution from the most probable branch. This greatly reduces the search spaces for a solution. The proposed BIRA algorithm results in 100% repair efficiency and fast redundancy analysis.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.9
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• pp.237-243
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• 2012

In recent system-on-chip (SoC) designs, several hundred embedded memory cores have occupied the largest portion of the chip area. Therefore, the yield of SoCs is strongly dependent on the yield of the embedded memory cores. If all memories had built-in self repair (BISR) with optimal repair rates, the area overhead would be very large. A bit-map sharing method using a memory grouping is proposed to reduce the area overhead. Since the bit-map memory occupies the largest portion of the area of the built-in redundancy analysis (BIRA), the proposed bit-map sharing method can greatly reduce the area overhead of the BIRA. Based on the experimental results, the proposed method can reduce the area overhead by about 80%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.24-30
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• 2010

In recent memories, repair is an unavoidable method to maintain its yield and quality. The probability of defect occurence on spare lines has been increased through the growth of the density of recent memories with 2 dimensional spare architecture. In this paper, a new analysis region virtualization scheme is proposed. the analysis region virtualization scheme can be applied with any BIRA (built-in redundancy analysis) algorithms without the loss of their repair rates. The analysis region virtualization scheme can be a viable solution for BIRA considering the faulty spare lines of the future high density memories.

• International Journal of Costume and Fashion
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• v.10 no.2
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• pp.37-49
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• 2010

The Samguk-yusa(三國遺事) is one of the two classics of Korean ancient history together with the Samguk-sagi(三國史記); however there has not been any positive attempt to analyse clothing culture centering on the Samguk-yusa until now. Thereupon, this study aims to find the records related to fabrics, color and fashion appearing in the Samguk-yusa, and to analyse the fashion culture of the three kingdoms projected in the Samguk-yusa, referring to the Samguk-sagi and ancient Chinese reference books. According to the records in the book, the fabrics used for clothing of those days included Jikgeum-wimun(織錦爲紋), Geum(錦), Chaebaek(彩帛), Osaek-geumchae(五色錦彩), Geumbaek(錦帛), Geumsam(錦衫), Ma(麻), Neung(綾), Geum-su-neung-ra(錦繡綾羅), Poh(布), Daecho, Bira-geumjeom(緋羅金點), Gyeon(絹). Japchoe(雜綵), Robtyeom(羅緋染). Chimilpoh(緻密布), Gi(綺) and Whan(紈), and they had colors such as brown black(緇), black(黑), purple(紫), yellow(黃), blue(碧), clear white(素), white(白), five colors(五色). There is substantial amoung of report on Buddhism, and the terms used for Buddhist clothing included Beobeui(法衣), Nabeui(衲衣), Bangpoh(方袍), Gasa(袈裟) and Yueui(由衣). It is also ascertained that Gasa had a variety of Bira-geumjeom-gasa(緋羅點袈裟), Manap-gasa(摩納袈裟) and Geumra-gasa(金羅袈裟).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.73-79
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• 2009

With the advance of VLSI technology, the capacity and density of memories are rapidly growing. In this paper we proposed MRI (Memory built-in self Repair Imagination zone) as reallocation algorithm. All faulty cells of embedded memory are reallocated into the row and column spare memory. This work implements reallocation algorithm and BISR to verify its design.