Browse > Article

Built-In Self Repair for Embedded NAND-Type Flash Memory  

Kim, Tae Hwan (숭실대학교 컴퓨터학과)
Chang, Hoon (숭실대학교 컴퓨터학부)
Publication Information
KIPS Transactions on Computer and Communication Systems / v.3, no.5, 2014 , pp. 129-140 More about this Journal
BIST(Built-in self test) is to detect various faults of the existing memory and BIRA(Built-in redundancy analysis) is to repair detected faults by allotting spare. Also, BISR(Built-in self repair) which integrates BIST with BIRA, can enhance the whole memory's yield. However, the previous methods were suggested for RAM and are difficult to diagnose disturbance that is NAND-type flash memory's intrinsic fault when used for the NAND-type flash memory with different characteristics from RAM's memory structure. Therefore, this paper suggests a BISD(Built-in self diagnosis) to detect disturbance occurring in the NAND-type flash memory and to diagnose the location of fault, and BISR to repair faulty blocks.
NAND-type Flash Memory; BISD; BISR; Diagnosis Algorithm; Redundancy Analysis;
Citations & Related Records
연도 인용수 순위
  • Reference
1 J.-C. Yeh, C.-F. Wu, K.-L. Cheng, Y.-F. Chou, C.-T. Huang, C.-W. Wu, "Flash memory built-in self-test using March-like algorithms", IEEE Int. Workshop on Electronic Design, Test and Applications, 2002, pp.137-141.
2 Stefano DI CARLO, Michele FABIANO, Roberto PIAZZA, and Paolo PRINETTO, "Exploring Modeling and Testing of NAND Flash memories," Test Symposium East-West Design, pp.47-50, 2010.
3 V. G. Mikitjuk, V. N. Yarmolik, and A. J. van deGoor, "RAM Testing Algorithms for Detection Multiple Linked Faults," Proc. European Design and Test Conf., pp.435-439, 1996.
4 Nur Qamarina Mohd Noor, Azilah Saparon, and Yusrina Yusof, "An Overview Of Microcode based and FSM based Programmable Memory Built-In Self Test(MBIST) Controller for Coupling Fault Detection", IEEE Symposium on Industrial Electronics and Applications(ISIEA 2009).
5 T. J. Bergfeld., D. Niggemeyer and E. M. Rudnick, "Diagnostic testing of embedded memories using BIST", Proc. IEEE, Design, Automation and Test in Europe Conference and Exhibition 2000, pp.305-309.
6 C.-T. Huang, C.-F. Wu, J.-F. Li, and C.-W. Wu, "Built-in redundancy analysis for memory yield improvement", IEEE Transactions on Reliability, Vol.52, pp.386-399, December, 2003.   DOI   ScienceOn
7 Y.-Y. Hsiao, C.-H. Chen, and C.-W. Wu, "Built-In Self-Repair Schemes for Flash Memories", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.29, No.8, pp.1243-1256, Aug., 2010.   DOI
8 M. G. Mohammad, K. K. Saluja, and A. Yap, "Testing Flash Memories", In Proceedings of Thirteenth Intel Conference on VLSI Design, pp.406-411, 2000.
9 M. F. Chang, W. K. Fuchs, J. H. Patel, "Diagnosis and repair of memory with coupling faults," computers, IEEE Transactions on, Vol.38, No.4, April, 1989, pp.493-500.   DOI   ScienceOn
10 P. Cappelletti, C. Golla, P. Olivo, and E. Zanoni, Flash Memories, Boston, MA: Kluwer Academic, 1999.
11 M. Mohammad and K. K. Saluja, "Flash memory disturbances : modeling and test", in Proc. IEEE VLSI Test Symp. (VTS), Marina Del Rey, California, Apr., 2001, pp.218-224.