• Title/Summary/Keyword: Application-SoC

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Analysis on Validity of Discounting the Deferred Payment Undertaking under Documentary Credit Transactions - with a Special Reference to the Application of Fraud Rule - (신용장거래에서 연지급확약할인의 유효성에 관한 연구 -사가의 원칙 적용을 중심으로-)

  • Hahn, Jae-Phil
    • Journal of Arbitration Studies
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    • v.21 no.2
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    • pp.133-156
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    • 2011
  • This paper is to analyze the legality in which the fraud rule allow the issuer of L/C or a court to disrupt the payment to the beneficiary under the deferred payment credit when the nominated bank for deferred payment undertaking made prepayment or negotiation before the maturity date and fraud is identified to be involved. Since the function of commercial L/C is to provide absolute assurance of payment to a beneficiary, the fraud rule based on fraud exception has been known as the negative factor which lead to the disruption of "principle of independence & abstraction" under the commercial L/C transactions. As a result, the fraud rule is necessary to limit the activities of fraudsters, but its scope must be carefully circumscribed so as not to deny commercial utility to an instrument that exists to serve as an assurance of payment. But the fraud itself has not been firmly established because it is inherently pliable in its concept. There are numerous contents to describe the application of fraud to the L/C transactions as a standard such as egregious fraud, intentional fraud, L/C fraud(omitted here), flexible fraud, and constructive fraud. And so the standard applicable to the commercial transaction as the fraud rule would be high or low depending upon the various standards of fraud.

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A Surface Modification of Hastelloy X by Sic Coating and Ion Beam Mixing for Application in Nuclear Hydrogen Production

  • Kim, Jaeun;Park, Jaewon;Kim, Minhwan;Kim, Yongwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.205.2-205.2
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    • 2014
  • The effects of ion beam mixing of a SiC film coated on super alloys (hastelloy X substrates) were studied, aiming at developing highly sustainable materials at above $900^{\circ}C$ in decomposed sulfuric acid gas (SO2/SO3/H2O) channels of a process heat exchanger. The bonding between two dissimilar materials is often problematic, particularly in coating metals with a ceramics protective layer. A strong bonding between SiC and hastelloy X was achieved by mixing the atoms at the interface by an ion-beam: The film was not peeled-off at ${\geq}900^{\circ}C$, confirming excellent adhesion, although the thermal expansion coefficient of hastelloy X is about three times higher than that of SiC. Instead, the SiC film was cracked along the grain boundary of the substrate at above $700^{\circ}C$. At ${\geq}900^{\circ}C$, the film was crystallized forming islands on the substrate so that a considerable part of the substrate surface could be exposed to the corrosive environment. To cover the exposed areas and cracks multiple coating/IBM processes have been developed. An immersion corrosion test in 80% sulfuric acid at $300^{\circ}C$ for 100 h showed that the weight retain rate was gradually increased when increasing the processing time.

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Integration of SoC Test and Verification Using Embedded Processor and Reconfigurable Architecture (임베디드 프로세서와 재구성 가능한 구조를 이용한 SoC 테스트와 검증의 통합)

  • Kim Nam-Sub;Cho Won-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.7 s.349
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    • pp.38-49
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    • 2006
  • In this paper, a novel concept based on embedded processor and reconfigurable logic is proposed for efficient manufacturing test and design verification. Unlike traditional gap between design verification and manufacturing test, proposed concept is to combine both design verification and manufacturing test. The semiconductor chip which is using the proposed concept is named "SwToC" and SwToC stands for System with Test On a Chip. SwToC has two main features. First, it has functional verification function on a chip and this function could be made by using embedded processor, reconfigurable logic and memory. Second, it has internal ATE on a chip and this feature also could be made by the same architecture. To evaluate the proposed SwToC, we have implemented SwToC using commercial FPGA device with embedded processor. Experimental results showed that the proposed chip is possible for real application and could have faster verification time than traditional simulation method. Moreover, test could be done using low cost ATE.

Multi-channel analyzer based on a novel pulse fitting analysis method

  • Wang, Qingshan;Zhang, Xiongjie;Meng, Xiangting;Wang, Bao;Wang, Dongyang;Zhou, Pengfei;Wang, Renbo;Tang, Bin
    • Nuclear Engineering and Technology
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    • v.54 no.6
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    • pp.2023-2030
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    • 2022
  • A novel pulse fitting analysis (PFA) method is presented for the acquisition of nuclear spectra. The charging process of the feedback capacitor in the resistive feedback charge-sensitive preamplifier is equivalent to the impulsive pulse, and its impulse response function (IRF) can be obtained by non-linear fitting of the falling edge of the nuclear pulse. The integral of the IRF excluding the baseline represents the energy deposition of the particles in the detector. In addition, since the non-linear fitting process in PFA method is difficult to achieve in the conventional architecture of spectroscopy system, a new multi-channel analyzer (MCA) based on Zynq SoC is proposed, which transmits all the data of nuclear pulses from the programmable logic (PL) to the processing system (PS) by high-speed AXI-Stream in order to implement PFA method with precision. The linearity of new MCA has been tested. The spectrum of 137Cs was obtained using LaBr3(Ce) scintillator detector, and was compared with commercial MCA by ORTEC. The results of tests indicate that the MCA based on PFA method has the same performance as the commercial MCA based on pulse height analysis (PHA) method and excellent linearity for γ-rays with different energies, which infers that PFA method is an effective and promising method for the acquisition of spectra. Furthermore, it provides a new solution for nuclear pulse processing algorithms involving regression and iterative processes.

An Approach to Application of Component Based on Message Central Processing change the C2 Architecture (C2 아키텍처를 변형한 메시지 중앙처리 기반의 Component 활용 기법)

  • 정화영
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.5
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    • pp.1089-1094
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    • 2003
  • Recently, Software development method supported CBD is applied with many concern and is researched with part of application and composition based-on architecture effectively use it. Effectively, C2 architecture has been concern with the point of component composition method based-on message driven for supported GUI. But, In case of classified sequence in component and method call method in server component, component must be modified to apply it. Thus, In this paper, Message handling part with a part of C2 architecture change is locate in the message neither component not connector. So, Although method call method it can be composit and operate component for support Plug-and-Play without modification. Also, it's possible the more flexible message handling with parallel composition of component between message without classified sequence.

Development and Verification of SoC Platform based on OpenRISC Processor and WISHBONE Bus (OpenRISC 프로세서와 WISHBONE 버스 기반 SoC 플랫폼 개발 및 검증)

  • Bin, Young-Hoon;Ryoo, Kwang-Ki
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.76-84
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    • 2009
  • This paper proposes a SOC platform which is eligible for education and application SOC design. The platform, fully synthesizable and reconfigurable, includes the OpenRISC embedded processor, some basic peripherals such as GPIO, UART, debug interlace, VGA controller and WISHBONE interconnect. The platform uses a set of development environment such as compiler, assembler, debugger and RTOS that is built for HW/SW system debugging and software development. Designed SOC, IPs and Testbenches are described in the Verilog HDL and verified using commercial logic simulator, GNU SW development tool kits and the FPGA. Finally, a multimedia SOC derived from the SOC platform is implemented to ASIC using the Magnachip cell library based on 0.18um 1-poly 6-metal technology.

A Study on the Fundamental Properties and Application as Cementious Admixture by Heating Temperature of Recycled Powder (재생미분말의 가열온도에 따른 기초물성 및 시멘트혼화재 적용성에 관한 연구)

  • 장종호;김용로;최세진;최희용;김문한;김무한
    • Proceedings of the Korea Concrete Institute Conference
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    • 2001.05a
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    • pp.635-640
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    • 2001
  • Recently, it has been processed to study about recycled aggregate but a study about using of recycled powder is producted when manufacturing recycled aggregate has not been acted. So in this study on the fundamental properties and application as cementious admixture by heating temperature for mortar properties of recycled powder and sand is obtained like following results. It is judged that application of recycled powder of heat treatment on $600^{\circ}C$ and cement replacement ratio below 10% is available.

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A Consideration on Fraud Exception and the Principle of Independence under the L/C transaction (신용장의 독립성의 원칙의 예외로서의 사기원칙에 관한 고찰)

  • Lee, Jong-Won
    • THE INTERNATIONAL COMMERCE & LAW REVIEW
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    • v.34
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    • pp.55-74
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    • 2007
  • The documentary credit has been functioning as an indispensable tool for making international commercial transactions safer throughout the world since ICC adopted the second revision of the Uniform Customs and Practices for Commercial Documentary Credits in 1962. Letter of Credit transaction should be cleared by the principle of the trust and integrity and vile partners sometimes make a fraud on the L/C by the misinterpretation of the documents. As there is no rule but no exception, exception from application of these principles is allowed. The fraud exception nile constitutes contracting out an application of basic principles, this rule should apply restrictively and in many authorities a court does not apply this rule to nominated bank, confirming bank, and bona fide holder of draft even if fraud is involved in L/C transactions. If not, we lose a lot of benefits from the credit as valuable commercial device through reservation of these principles to take a few benefits. So, We need to recognize that the fraud exception rule should be applied restrictively. Therefore, this study reviewed condition of application and exception from application of fraud exception rule in view of Cardozo's opinion, the Sztejn court, and UCC Sections-114(2).

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A Programmable Compensation Circuit for System-on-Chip Application

  • Choi, Woo-Chang;Ryu, Jee-Youl
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.3
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    • pp.198-206
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    • 2011
  • This paper presents a new programmable compensation circuit (PCC) for a System-on-Chip (SoC). The PCC is integrated with $0.18-{\mu}m$ BiCMOS SiGe technology. It consists of RF Design-for-Testability (DFT) circuit, Resistor Array Bank (RAB) and digital signal processor (DSP). To verify performance of the PCC we built a 5-GHz low noise amplifier (LNA) with an on-chip RAB using the same technology. Proposed circuit helps it to provide DC output voltages, hence, making the RF system chain automatic. It automatically adjusts performance of an LNA with the processor in the SoC when it goes out of the normal range of operation. The PCC also compensates abnormal operation due to the unusual PVT (Process, Voltage and Thermal) variations in RF circuits.

A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications

  • Giustolisi, Gianluca;Palumbo, Gaetano;Spitale, Ester
    • ETRI Journal
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    • v.32 no.4
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    • pp.520-529
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    • 2010
  • In this paper, we present a low-voltage low-dropout voltage regulator (LDO) for a system-on-chip (SoC) application which, exploiting the multiplication of the Miller effect through the use of a current amplifier, is frequency compensated up to 1-nF capacitive load. The topology and the strategy adopted to design the LDO and the related compensation frequency network are described in detail. The LDO works with a supply voltage as low as 1.2 V and provides a maximum load current of 50 mA with a drop-out voltage of 200 mV: the total integrated compensation capacitance is about 40 pF. Measurement results as well as comparison with other SoC LDOs demonstrate the advantage of the proposed topology.