Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Integration of SoC Test and Verification Using Embedded Processor and Reconfigurable Architecture

임베디드 프로세서와 재구성 가능한 구조를 이용한 SoC 테스트와 검증의 통합

  • Kim Nam-Sub (School of Electronics and Information, Kyung Hee University) ;
  • Cho Won-Kyung (School of Electronics and Information, Kyung Hee University)
  • 김남섭 (경희대학교 전자정보학부) ;
  • 조원경 (경희대학교 전자정보학부)
  • Published : 2006.07.01
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Abstract

In this paper, a novel concept based on embedded processor and reconfigurable logic is proposed for efficient manufacturing test and design verification. Unlike traditional gap between design verification and manufacturing test, proposed concept is to combine both design verification and manufacturing test. The semiconductor chip which is using the proposed concept is named "SwToC" and SwToC stands for System with Test On a Chip. SwToC has two main features. First, it has functional verification function on a chip and this function could be made by using embedded processor, reconfigurable logic and memory. Second, it has internal ATE on a chip and this feature also could be made by the same architecture. To evaluate the proposed SwToC, we have implemented SwToC using commercial FPGA device with embedded processor. Experimental results showed that the proposed chip is possible for real application and could have faster verification time than traditional simulation method. Moreover, test could be done using low cost ATE.

본 논문에서는 SoC를 검증 및 테스트하기 위한 새로운 개념의 칩을 제안하고 이를 SwToC(System with Test on a Chip)라 명명한다. SwToC는 SoC의 임베디드 프로세서에 재구성 가능한 로직을 추가하여 칩의 물리적인 결함을 테스트할 수 있을 뿐만 아니라 기존의 기법으로는 수행이 어려웠던 테스트 단계에서의 디자인 검증이 가능하도록 한 칩을 말한다. 제안한 개념의 칩은 고속 검증이 가능하며 테스트를 위해 많은 비용이 소모되는 ATE 가 불필요한 장점을 갖고 있다. 제안한 칩의 디자인 검증 및 테스트 기능을 평가하기 위하여 임베디드 프로세서가 내장된 상용 FPGA를 이용하여 SwToC를 구현하였으며, 구현 결과 제안한 칩의 실현 가능성을 확인하였고 적은 비용의 단말기를 통한 테스트가 가능함은 물론 기존의 검증기법에 비해 고속 검증이 가능함을 확인하였다.

Keywords

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