• Title/Summary/Keyword: Active biasing circuit

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LNA Design Uses Active and Passive Biasing Circuit to Achieve Simultaneous Low Input VSWR and Low Noise (낮은 입력 정재파비와 잡음을 갖는 수동 및 능동 바이어스를 사용한 저잡음증폭기에 관한 연구)

  • Jeon, Joong-Sung
    • Journal of Advanced Marine Engineering and Technology
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    • v.32 no.8
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    • pp.1263-1268
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    • 2008
  • In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

Accurate modeling of small-signal equivalent circuit for heterojunction bipolar transistors (이종접합 바이폴라 트랜지스터에 관한 소신호 등가회로의 정확한 모델링)

  • 이성현
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.7
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    • pp.156-161
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    • 1996
  • Accurate equivalent circuit modeling using multi-circuit optimization has been perfomred for detemining small-signal model of AlGaAs/GaAs HBTs. Three equivalent circuits for a cutoff biasing and two active biasing at different curretns are optimized simultaneously to fit gheir S parameters under the physics-based constrain that current-dependent elements for one of active circuits are connected to those for another circit multiplied by the ratio of two currents. The cutoff mode circuit and the physical constrain give the advantage of extracting physically acceptable parameters, because the number of unknown variables. After this optimization, three ses of optimized model S-parameters agree well with their measured S-parameters from 0.045 GHz to 26.5GHz.

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A Study of Suppression Current for LDMOS under Variation of Temperature (온도변화에 따른 LDMOS의 전류변동 억제에 관한 연구)

  • Jeon, Joong-Sung
    • Journal of Advanced Marine Engineering and Technology
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    • v.30 no.8
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    • pp.901-906
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    • 2006
  • In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.

The RF Power Amplifier Using Active Biasing Circuit for Suppression Drain Current under Variation Temperature (RF전력 증폭기의 온도 변화에 따른 Drain 전류변동 억제를 위한 능동 바이어스 회로의 구현 및 특성 측정)

  • Cho, Hee-Jea;Jeon, Joong-Sung;Sim, Jun-Hwan;Kang, In-Ho;Ye, Byeong-Duck;Hong, Tchang-Hee
    • Journal of Navigation and Port Research
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    • v.27 no.1
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    • pp.81-86
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    • 2003
  • In the paper, the power amplifier using active biasing for LDMOS MRF-21060 is designed and fabricated. Driving amplifier using AH1 and parallel power amplifier AH11 is made to drive the LDMOS MRF 21060 power amplifier. The variation of current consumption in the fabricated 5 Watt power amplifier has an excellent characteristics of less than 0.1A, whereas passive biasing circuit dissipate more than 0.5A. The implemented power amplifier has the gain over 12 dB, the gain flatness of less than $\pm$0.09dB and input and output return loss of less than -19dB over the frequency range 2.11~2.17GHz. The DC operation point of this power amplifier at temperature variation from $0^{\circ}C$ to $60^{\circ}C$ is fixed by active circuit.

A Novel Active Common-mode EMI Filter for Mitigating Conducted EMI (전도성 EMI저감을 위한 능동형 공통모드 EMI 필터)

  • Son Yo-Chan;Sul Seung-Ki
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.91-94
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    • 2002
  • This paper presents a novel active common-mode EMI filter for the PWM inverter application. The proposed filter is based on the current sensing and compensation circuit and it utilizes a fast transistor amplifier for the current compensation. The amplifier utilizes an isolated low-voltage dc power supply for its biasing and it is possible to construct the active filter independent of the source voltage of the equipment. Thus the proposed active filter can be used in any application regardless of its working voltage. The effectiveness of the proposed circuit is verified by experimental results.

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A High-Voltage Compliant Neural Stimulation IC for Implant Devices Using Standard CMOS Process (체내 이식 기기용 표준 CMOS 고전압 신경 자극 집적 회로)

  • Abdi, Alfian;Cha, Hyouk-Kyu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.5
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    • pp.58-65
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    • 2015
  • This paper presents the design of an implantable stimulation IC intended for neural prosthetic devices using $0.18-{\mu}m$ standard CMOS technology. The proposed single-channel biphasic current stimulator prototype is designed to deliver up to 1 mA of current to the tissue-equivalent $10-k{\Omega}$ load using 12.8-V supply voltage. To utilize only low-voltage standard CMOS transistors in the design, transistor stacking with dynamic gate biasing technique is used for reliable operation at high-voltage. In addition, active charge balancing circuit is used to maintain zero net charge at the stimulation site over the complete stimulation cycle. The area of the total stimulator IC consisting of DAC, current stimulation output driver, level-shifters, digital logic, and active charge balancer is $0.13mm^2$ and is suitable to be applied for multi-channel neural prosthetic devices.

The 100Watt Unit Power Amplifier Using Temperature Independent Biasing for DTV Repeater Application (Temperature Independent Biasing을 사용한 DTV 중계기용 100Watt급 단위 전력증폭기의 구현)

  • Lee, Young-Sub;Jeon, Joong-Sung;Lee, Seok-Jeong;Ye, Byeong-Duck;Hong, Tchang-Hee
    • Journal of Navigation and Port Research
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    • v.26 no.2
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    • pp.215-220
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    • 2002
  • In this paper, the 100 watt unit ower amplifier using temperature independent biasing for DTV (Digital Television) repeater application is designed and fabricated. The DC operation point of this unit power amplifier at temperature variation from $20^{\circ}C$ to $100^{\circ}C$ is fixed by active bias circuit. The variation of current consumption in the 100 watt unit power amplifier has an excellent characteristics of less than 0.6A. The implemented unit power amplifier has the gain over 12dB, the gain flatness of less than 0.5dB and input and output return, loss of than 15dB over the DTV repeater frequency range (470~806MHz). This unit power amplifier yields intermodulation distortion(IMD) of more than 32dBc at 2MHz offset, which satisfies the IMD at output power of 100 watt (50dBm).

전력증폭기를 위한 능동 바이어스 모듈 개발

  • Park, Jeong-Ho;Lee, Min-U;Go, Ji-Won;Gang, Jae-Uk;Im, Geon
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2006.06a
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    • pp.301-302
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    • 2006
  • 초고주파 전력 증폭기의 바이어스 전압을 조절하여 온도 변화에 따른 드레인(Drain) 전류의 변화를 억제하기 위한 저가의 능동 바이어스 모듈을 개발한다. 능동 바이어스 모듈을 5 W급 초고주파 전력증폭기에 적용하였을 경우, $0{\sim}60^{\circ}C$까지의 온도변화에 대하여 소모전류 변화량은 0.1 A 이하로 되어야 한다. 본 기술 개발 대상인 능동 바이어스 모듈의 성능 시험을 위한 대상 전력증폭기는 $2.11{\sim}2.17GHz$ 주파수 대역에서 32 dB 이상의 이득과 ${\pm}0.1\;dB$ 이하의 이득 평탄도, -15 dB 이하의 입.출력 반사손실을 가진다.

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A CMOS Bandgap Reference Voltage Generator for a CMOS Active Pixel Sensor Imager

  • Kim, Kwang-Hyun;Cho, Gyu-Seong;Kim, Young-Hee
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.2
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    • pp.71-75
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    • 2004
  • This paper proposes a new bandgap reference (BGR) circuit which takes advantage of a cascode current mirror biasing to reduce the V$\_$ref/ variation, and sizing technique, which utilizes two related ratio numbers k and N, to reduce the PNP BJT area. The proposed BGR is designed and fabricated on a test chip with a goal to provide a reference voltage to the 10 bit A/D(4-4-4 pipeline architecture) converter of the CMOS Active Pixel Sensor (APS) imager to be used in X-ray imaging. The basic temperature variation effect on V$\_$ref/ of the BGR has a maximum delta of 6 mV over the temperature range of 25$^{\circ}C$ to 70$^{\circ}C$. To verify that the proposed BGR has radiation hardness for the X-ray imaging application, total ionization dose (TID) effect under Co-60 exposure conditions has been evaluated. The measured V$\_$ref/ variation under the radiation condition has a maximum delta of 33 mV over the range of 0 krad to 100 krad. For the given voltage, temperature, and radiation, the BGR has been satisfied well within the requirement of the target 10 bit A/D converter.

A Study on Design and Implementation of Low Noise Amplifier for Satellite Digital Audio Broadcasting Receiver (위성 DAB 수신을 위한 저잡음 증폭기의 설계 및 구현에 관한 연구)

  • Jeon, Joong-Sung;You, Jae-Hwan
    • Journal of Navigation and Port Research
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    • v.28 no.3
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    • pp.213-219
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    • 2004
  • In this paper, a LNA(Low Noise Amplifier) has been developed, which is operating at L-band i.e., 1452∼1492 MHz for satellite DAB(Digital Audio Brcadcasting) receiver. The LNA is designed to improve input and output reflection coefficient and VSWR(Voltage Standing Wave Ratio) by balanced amplifier. The LNA consists of low noise amplification stage and gain amplification stage, which make a using of GaAs FET ATF-10136 and VNA-25 respectively, and is fabricated by hybrid method. To supply most suitable voltage and current, active bias circuit is designed Active biasing offers the advantage that variations in $V_P$ and $I_{DSS}$ will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets $V_{gs}$ for the desired drain voltage and drain current. The LNA is fabricated on FR-4 substrate with RF circuit and bias circuit, and integrated in aluminum housing. As a reults, the characteristics of the LNA implemented more than 32 dB in gain. 0.2 dB in gain flatness. lower than 0.95 dB in noise figure, 1.28 and 1.43 each input and output VSWR, and -13 dBm in $P_{1dB}$.