• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.50-55
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• 2008

In this paper, New LC VCO with $8{\sim}10.9$ GHz Band has been designed using commercial $0.35-{\mu}m$ CMOS technology. This proposed circuit is consisted of the parallel construction of the typical NMOS and PMOS cross-coupled pair which is based on the LC tank, MOS cross-coupled pair which has same tail current of complementary NMOS and PMOS, and output buffer. The designed LC VCO, which is according to proposed structure in this paper, takes a 29% improvement of the wide tuning range as 8 GHz to 10.9 GHz, and a 6.48mW of low power dissipation. Its core size is $270{\mu}m{\times}340{\mu}m$ and its phase noise is as -117dBc Hz and -137dBc Hz at 1-MHz and 10-MHz offset, respectively. FOM of the new proposed LC VCO gets -189dBc/Hz at a 1-MHz offset from a 10GHz center frequency. This design is very useful for the 10Gb/s clock generator and data recovery integrated circuit(IC) and SONET communication applications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.3
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• pp.368-377
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• 1999

In this paper, the wide-band CDMA transmitter for 2 GHz band is designed and implemented. The CC-OQPSK implemented as ASIC has better spectral and power efficiency than the conventional QPSK system because it has constant envelope characteristics. Good harmonics rejection characteristics and gain of 20 dB are shown on the intermediate frequency stage using double-conversion scheme. The output power of two-stage RF amplifier is +2l.14 dBm in 1.9 GHz band. It is confirmed that the electrical characteristics of the transmitter satisfy with required the specification of the wide-band CDMA transmitter for 2 GHz band.

• The Journal of the Korea institute of electronic communication sciences
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• v.5 no.6
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• pp.620-624
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• 2010

In this paper, design and manufactured UWB BPF. Manufactured UWB BPF can miniaturize the structure by controlling impedance and biographical one dimension that is allocated in transmission line each section. Proposed UWB BPF designed most suitable using Agilent company's ADS2008 Momentum and Ansoft company's HFSS 10. Manufactured UWB BPF has pass-band filter of 3.1 [GHz]~10.6 [GHz] and insertion loss is 0.39 [dB] in 8.3 [GHz], and reflection loss displayed special quality of 12.394 [dB] in 9.37 [GHz].

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.9A
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• pp.2221-2229
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• 1998

Handoff is an important parameter for system performance and capacity analysis in CDMA cell planning. In this paper, simulation tool for analyzing the effects of soft handoff on cell planning of CDMA network is developed by studying propagation model in 1.9GHz frequency specrum, soft hadnoff algorithm given by IS-95, and several parameters for CDMA cell planning. By using the tool, soft handoff gain and effects of soft handoff on cDMA system performance and capacity are analyzed. Research results and simulation tool developed in this paper can be used for optimal CDMA cell planning for PCS and IMT-2000 in 1.9GHz frequency spectrum such as locating base station and parameter optimization.

• Journal of IKEEE
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• v.24 no.1
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• pp.238-242
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• 2020

This paper presents a technique using a multilayered dielectric coating to reduce the radar cross section (RCS) value of an integrated mast mounted in a destroyer. The proposed multilayer structure has the advantage of being easy to fabricate because the dielectric constant is defined so that a general dielectric that does not contain a magnetic component that requires high dielectric constant or is frequently used for blocking electromagnetic wave absorption can be used. After applying the proposed multi-layer dielectric structure to the integrated mast shape, the simulation results show that the RCS reduction performance is 10.9dB at 6GHz, 11.95dB at 12GHz, and 11.63dB at 18GHz compared to the structure without the multilayer structure.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.1
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• pp.23-28
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• 2016

In this paper, a Multi-Band Ku-band down converter was designed for reception of multi-band digital satellite broadcasting. The Multi-band low-nose down converter was designed to form four local oscillator frequencies (9.75, 10, 10.75 and 11.3GHz) representing a low phase noise due to VCO-PLL with respect to input signals of 10.7 to 12.75GHz and 3-stage low noise amplifier circuit by broadband noise matching, and to select an one band of intermediate frequency (IF) channels by digital control. The developed low-noise downconverter exhibited the full conversion gain of 64dB, and the noise figure of low-noise amplifier was 0.7dB, the P1dB of output signal 15dBm, and the phase noise -73dBc@100Hz at the band 1 carrier frequency of 9.75GHz. The low noise block downconverter (LNB) for receiving four-band digital satellite broadcasting designed in this paper can be used for satellite broadcasting of vessels navigating international waters.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.10
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• pp.745-751
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• 2018

This paper reports on the design of a multiband multiple-input and multiple-output(MIMO) antenna for long-term evolution(LTE) vehicular communication and includes an analysis of the throughput field test results that were acquired by mounting the antenna to a vehicle. The antenna used for the field test was designed as a planar structure and included multiple stubs to obtain multiband resonant characteristics operating in the LTE(0.8~0.9 GHz, 1.7~2.2 GHz), Wi-Fi(2.4~2.48 GHz), and wireless access in vehicular environments (WAVE)(5.8~5.9 GHz) frequency bands. For the field test, antenna prototypes were mounted on the dashboard and roof of a vehicle and connected to the experimental LTE modem. The data transfer rate(throughput), signal-to-interference-plus-noise ratio(SINR), and reference signal received quality(RSRQ) were measured and analyzed in various real-world radio wave environments. Based on these results, the relationship between the SINR and throughput according to the field intensity is confirmed.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.2
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• pp.37-44
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• 2008

This paper presents a 5.8 GHz PLL using high-speed ring oscillator for WLAN. The proposed ring oscillator has been designed using the negative skewed delay scheme and for differential mode operation. Therefore, the oscillator is insensitive to power-supply-injected noise, and it has the merit of low 1/f noise because tail current sources are not used. The output frequency ranges from 5.13 to 7.04 GHz with the control voltage varing from 0 to 1.8 V. The proposed PLL circuits have been designed, simulated, and proved using 0.18 um 1.8 V TSMC CMOS library. At the operation frequency of 5.8 GHz, the locking time is 2.5 us and the simulated power consumption is 59.9 mW.

• Journal of Electrical Engineering and Technology
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• v.9 no.4
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• pp.1365-1368
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• 2014

A CPW-fed to CPS dipole antenna of triangular loop director by microstrip tapered balun is proposed for dual and wide band operations, in this paper. The proposed antenna is consisted of a CPW-fed to CPS transform, microstrip tapered balun element, CPS dipole driver and triangular loop director. A dual and wide bandwidth of the proposed dipole antenna is realized by introducing the triangular loop director and taper matching element. The operated frequency bandwidth is 1GHz (2.14~3.14 GHz) and 1.9 GHz (4.6~6.5 GHz) to return loss criterion of less than 10 dB. The measured return loss of the proposed antenna showed good results of the dual and wide band operating frequency and the radiation pattern. The proposed antenna is able to support WLAN wireless communications applications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.5
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• pp.397-400
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• 2018

This paper presents a miniaturized 65 nm CMOS 30~46 GHz wideband amplifier. To minimize the chip area, coupled inductors are used in the matching networks. The measurement shows that the fabricated amplifier exhibits 9.3 dB of peak gain, 16 GHz of 3 dB bandwidth, and 42 % fractional bandwidth. The measured input and output return losses were more than 10 dB at 35.8~46.0 GHz and 28.6~37.8 GHz, respectively. The chip consumes 42 mW at 1.2 V. The measured group delay variation is 19.1 ps within the 3 dB bandwidth and the chip size excluding the pads is $0.09mm^2$.