• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.1957-1959
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• 2005

표면이 도핑된 SOI RESURF LDMOSFET에 대해 표면 도핑의 깊이에 따른 항복전압 및 순방향 특성을 분석하였다. 표면 도핑영역의 깊이를 $0.5{\sim}2.0{\mu}m$까지 변화시켜가며 항복전압의 변화와 온-저항의 변화를 시뮬레이션 하였다. 표면 도핑영역의 깊이에 따라 항복전압은 $73V{\sim}138V$까지 변화하였으며, 온-저항도 $0.18{\sim}0.143{\Omega}/cm^2$까지 변화하였다. 항복전압은 표면 도핑 영역의 깊이가 $1.5{\mu}m$때 138V로 가장 높게 나타났으며, 동일한 에피 영역의 농도를 사용한 기존의 소자와 비교하였을 때 약 22.1%의 항복전압의 증가를 나타냈으며, 온-저항값은 약 21.8%정도 감소하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.5
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• pp.1196-1202
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• 2013

This paper have analyzed the change of breakdown voltage for channel doping concentration and device parameters of double gate(DG) MOSFET using two dimensional potential model. The low breakdown voltage becomes the obstacle of power device operation, and breakdown voltage decreases seriously by the short channel effects derived from scaled down device in the case of DGMOSFET. The two dimensional analytical potential distribution derived from Poisson's equation have been used to analyze the breakdown voltage for device parameters such as channel length, channel thickness, gate oxide thickness and channel doping concentration. Resultly, we could observe the breakdown voltage has greatly influenced on device dimensional parameters as well as channel doping concentration, especially the shape of Gaussian function used as channel doping concentration.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1512-1514
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• 2005

사이리스터의 파괴 원인에는 온도, 전압, 전류, 진동 및 압력 등이 있다. 본 논문에서는 이러한 파괴원인들 중에서 전압과 온도를 스트레스 인자로 하여 가속열화에 따른 소자의 항복전압 특성의 변화에 대해 실험을 통해 분석하였다. 실험에 사용한 사이리스터는 $V_{DRM}$=1800, $V_{RRM}$=2300V, $I_{DRM}$, $I_{RRM}$=20mA인 소자를 사용하였으며, 실험 시 인가전압은 1kV, 온도는 $100^{\circ}C$로 고정하였다. 가속열화에 따른 순방향 및 역방향 항복특성의 변화를 가속열화 시간에 따라 나타내었고, 이를 바탕으로 전압과 온도에 따른 항복전압 감소의 원인과 열화의 진행에 대해 기술하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.3
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• pp.672-677
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• 2013

This paper have analyzed the change of breakdown voltage for channel dimension of double gate(DG) MOSFET. The breakdown voltage to have the small value among the short channel effects of DGMOSFET to be next-generation devices have to be precisely analyzed. The analytical solution of Poisson's equation have been used to analyze the breakdown voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The breakdown voltages have been analyzed for device parameters such as channel thickness and doping concentration, and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. As a result, we know the breakdown voltage is influenced on Gaussian function and device parameters for DGMOSFET.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.825-828
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• 2012

This paper have analyzed the change of breakdown voltage for conduction path of double gate(DG) MOSFET. The low breakdown voltage among the short channel effects of DGMOSFET have become obstacles of device operation. The analytical solution of Poisson's equation have been used to analyze the breakdown voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The change of breakdown voltages for conduction path have been analyzed for device parameters such as channel length, channel thickness, gate oxide thickness and doping concentration. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. Resultly, we know the breakdown voltage is greatly influenced on the change of conduction path for device parameters of DGMOSFET.

• Journal of IKEEE
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• v.22 no.2
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• pp.339-343
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• 2018

Power semiconductors are semiconductors capable of controlling power over 1W and are mainly used as switches. This power semiconductor device has been developed with the goal of reducing power consumption and high breakdown voltage. This research was analyzed electrical characteristics of IGBT(Insulated Gate Biopolar Transistor) according to diffusion length of JFET region. The Diffusion length of JFET region was controlled by temperature and time using T-CAD simulator. As a result of experiments, we could obtain 1.14V low on state voltage drop by fixing 1440V breakdown voltage.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.811-814
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• 2012

This paper have analyzed the change of breakdown voltage for channel dimension of double gate(DG) MOSFET. The breakdown voltage to have the small value among the short channel effects of DGMOSFET to be next-generation devices have to be precisely analyzed. The analytical solution of Poisson's equation have been used to analyze the breakdown voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The breakdown voltages have been analyzed for device parameters such as channel thickness and doping concentration, and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. Resultly, we know the breakdown voltage is influenced on Gaussian function and device parameters for DGMOSFET.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.772-775
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• 2007

본 연구에서는 Sentaurus를 이용하여 전압의 변화에 따른 항복전압과 전류의 경계 조건을 나타내려고 한다. 다이오드는 순방향 일 때 전류가 흐르고, 역방향 일 때는 전류가 흐르지 않는다. 하지만 역전압을 계속 올리면 어느 순간에 갑자기 전류가 흐르게 되는데 이때 전압을 항복전압이라 하며 전류의 경계조건은 컬렉터 전류의 변화에 따라 다르게 표현된다. 본 연구에서는 Sentaurus 시뮬레이션 프로그램을 이용하여 항복 전압과 전류의 경계조건을 설계하고자 한다.

• Journal of IKEEE
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• v.27 no.4
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• pp.567-572
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• 2023

In this paper, the breakdown voltage of Pi-LDMOS (Partial isolation lateral double diffused metal oxide semiconductor) was analyzed by simulation. Breakdown voltage variation is investigated under various settings of Parial buied oxide(P-BOX) parameters(length, thickness, location) and their mechanism is specified. In addition, the change in on-resistance in the breakdown voltage and trade-off relationship was analyzed according to the change in the P-BOX parameter, and the Figure-of-merit(FOM) was calculated and compared. In proposed structure, Lbox=5 ㎛, tbox=2 ㎛, and Lbc=2 ㎛ showed the highest breakdown voltage of 138V, and Lbox=5 ㎛, tbox=1.6 ㎛, and Lbc=2 ㎛ showed the highest FOM. Compared to conventional LDMOS, the breakdown voltage is 123% and FOM is 3.89 times improved. Therefore, Pi-LDMOS has a high breakdown voltage and FOM, which can contribute to the improvement of the stable operating range of the Power IC.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.649-652
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• 1998

본 논문에서는 MICROTEC〔3,4〕시뮬레이터를 이용하여 소트키 다이오드를 형성하고 금속-반도체 쇼트키 접촉에서 턴 온 전압과 항복 전압을 관찰하였다. 또한 여러 가지 쇼트키 장벽 높이를 가지는 금속을 사용하여 동일한 디바이스에서 이들 금속-반도체 접촉에 전압을 인가했을 때, 순 방향에서 턴 온 특성을 관찰하여 턴 온 전압과 역 방향에서의 항복 현상을 관찰하여 항복 전압을 확인하였다. 사용된 금속은 Au(0.8V), Mo(0.68V), Pt(0.9V), Ti(0.5V) 이며 반도체는 실리콘 n/n 구조가 형성되었다. 쇼트키 다이오드는 대 전력용 보다는 높은 속도의 스위칭 디바이스에 주로 응용되고 있으며 장벽의 높이가 높을수록 뚜렷한 정류 특성을 나타내어 순 방향 바이어스에서 빠른 턴 온 특성이 예상되는데 시뮬레이션 결과 또한 잘 일치하였다. 그리고 다이오드의 I-V 특성을 관찰하기 위해 역 방향 바이어스에서의 항복 전압을 관찰하였는데 쇼트키 장벽이 높을수록 낮은 항복 전압이 나타났다. 또한 디바이스 공정에서 epitaxial과 열처리 공정 후의 2차원적인 농도 분포를 나타내었다.