• Journal of KIISE:Computing Practices and Letters
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• v.13 no.4
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• pp.213-225
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• 2007

Flash memory is widely used as a storage device for potable equipments such as digital cameras, MP3 players and cellular phones because of its characteristics such as its large volume and nonvolatile feature, low power consumption, and good performance. However, a block in flash memories should be erased to write because of its hardware characteristic which is called as erase-before-write architecture. The erase operation is much slower than read or write operations. FTL is used to overcome this problem. We compared the performance of the existing FTL algorithms on Windows-based OS. We have developed a tool called FTL APAT in order to gather I/O patterns of the disk and analyze the performance of the FTL algorithms. It is the log buffer scheme with full associative sector translation(FAST) that the performance is best.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.2
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• pp.201-205
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• 2008

The flash memory is widely used as a main storage of embedded devices. It is adopted as a storage of database as growing the capacity of the flash memory. We run TPC-C benchmark on various FTL algorithms. But, the database shows poor performance on flash memory because the characteristic of I/O requests is full random. In this paper, we show the performance of all existing FTL algorithms is very poor. Especially, the FTL algorithm known as good at small mobile equipment shows worst performance. In addition, the chip-inter leaving which is a technique to improve the performance of the flash memory doesn't work well. In this paper, we inform you the reason that we need a new FTL algorithm and the direction for the database in the future.

• Proceedings of the Korean Information Science Society Conference
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• 2006.06c
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• pp.61-63
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• 2006

휴대용 기기들의 데이터 저장소로 플래시 메모리가 많이 사용되고 있으며 플래시 메모리가 대용량화 되어감에 따라 점차 디스크를 대체할 것이라 예상된다. 따라서 데이터베이스 시스템 역시 저장 매체로 플래시 메모리의 사용이 증가할 것으로 예상되며 이에 따른 효율적인 인덱스가 필요하다. 플래시 메모리 기반의 효율적인 인덱스 구축을 위하여 B+ 트리의 페이지 크기에 따른 성능 평가가 필요하다. 본 논문에서는 B+ 트리와 버퍼 관리자를 구현하고, 플래시 변환 계층의 대표적인 4 가지 알고리즘에 대해 B+ 트리의 페이지 크기에 따른 성능을 비교, 분석하여 플래시 메모리 기반의 인덱스를 구축하기 위한 방향을 제시한다.

• The KIPS Transactions:PartD
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• v.18D no.3
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• pp.157-168
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• 2011

Recently flash memory has been being utilized as a main storage device in mobile devices, and flashSSDs are getting popularity as a major storage device in laptop and desktop computers, and even in enterprise-level server machines. Unlike HDDs, on flash memory, the overwrite operation is not able to be performed unless it is preceded by the erase operation to the same block. To address this, FTL(Flash memory Translation Layer) is employed on flash memory. Even though the modified data block is overwritten to the same logical address, FTL writes the updated data block to the different physical address from the previous one, mapping the logical address to the new physical address. This enables flash memory to avoid the high block-erase cost. A flashSSD has an array of NAND flash memory packages so it can access one or more flash memory packages in parallel at once. To take advantage of the internal parallelism of flashSSDs, it is beneficial for DBMSs to request I/O operations on sequential logical addresses. However, the B-tree structure, which is a representative index scheme of current relational DBMSs, produces excessive I/O operations in random order when its node structures are updated. Therefore, the original b-tree is not favorable to SSD. In this paper, we propose AS(Always Sequential) B-tree that writes the updated node contiguously to the previously written node in the logical address for every update operation. In the experiments, AS B-tree enhanced 21% of B-tree's insertion performance.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.3
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• pp.161-171
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• 2010

As embedded systems adopt monolithic kernels, NAND flash memory is used for swap space of virtual memory systems. While flash memory has the advantages of low-power consumption, shock-resistance and non-volatility, it requires garbage collections due to its erase-before-write characteristic. The efficiency of garbage collection scheme largely affects the performance of flash memory. This paper proposes a novel garbage collection technique which exploits data redundancy between the main memory and flash memory in flash memory-based virtual memory systems. The proposed scheme takes the locality of data into consideration to minimize the garbage collection overhead. Experimental results demonstrate that the proposed garbage collection scheme improves performance by 37% on average compared to previous schemes.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.9
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• pp.483-490
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• 2005

Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption. However, due to its hardware characteristics, it requires a software layer called FTL(flash translation layer). The main functionality of FTL is to convert logical addresses from the host to physical addresses of flash memory We present a new FTL algorithm called STAFF(State Transition Applied Fast Flash Translation Layer). Compared to the previous FTL algorithms, STAFF shows five times higher performance than basic block mapping scheme and requires less memory. We provide performance results based on our implementation of STAFF and previous FTL algorithms.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.04a
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• pp.1302-1305
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• 2011

스마트폰에서 낸드 플래시 메모리가 저장 장치로 사용됨에 따라 다양한 플래시 파일 시스템과 플래시 변환 계층들이 제시되었다. 플래시 메모리는 덮어 쓰기가 불가능하기 때문에 이들 기법들은 기본적으로 로그 기반 구조를 취하고 있지만 가비지 수집, 데이터 배치 정책의 설계에 따라 성능과 수명 관리 측면에서 많은 차이를 보인다. 본 논문은 플래시 메모리 관리 기법들의 다양한 설계가 성능에 미치는 영향을 알아보고 종합적으로 비교 해보기 위해 대표적인 스마트폰 플랫폼인 안드로이드상에서 시뮬레이션 기반의 성능 평가를 수행 한다. 또한 각 기법들의 설계가 성능에 미치는 영향을 분석 한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2008.11a
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• pp.828-831
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• 2008

플래시 메모리(Flash Memory) 기술이 빠르게 발전하면서, 플래시 메모리 기반의 저장 장치가 개인용 컴퓨터나 엔터프라이즈 서버 시스템과 같은 시스템에 2차적인 저장 장치로써 사용가능해지고 있다. FTL(Flash Translation Layer)의 기본적인 기능은 플래시 메모리의 논리 주소를 물리 주소로 바꾸는 것임에도 불구하고, FTL의 효율적인 알고리즘은 성능과 수명에 상당한 효과를 가지고 있다. 이 논문에서는 MP3 플레이어와 디지털 카메라, SSDs(Solid-State Disk)와 같은 낸드 플래시 메모리(NAND Flash Memory) 기반의 어플리케이션을 위한 N : N+K 매핑을 사용하는 새로운 FTL 설계를 제안한다. 성능에 영향을 미치는 매개변수들을 분류하여, 다양한 워크로드 분석을 기반으로 FTL을 조사했다. 우리가 제안하는 FTL을 가지고, 낸드 플래시 어플리케이션 가동에 따라 어떤 매개변수가 최대 성능을 낼 수 있는지 알아낼 수 있고, 그 변수들을 유연하게 조정하여 성능을 더 향상시킬 수 있다.

• The KIPS Transactions:PartD
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• v.17D no.6
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• pp.383-394
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• 2010

Flash memory based SSDs are currently being considered as a promising candidate for replacing hard disks due to several superior features such as shorter access time, lower power consumption and better shock resistance. However, SSDs have different characteristics from hard disk such as difference of unit and time for read, write and erase operation and impossibility for over-writing. Because of these reasons, SSDs have disadvantages on hard disk based systems, so FTL(Flash Translation Layer) is designed to increase SSDs' efficiency. In this paper, we propose an advanced logical address mapping method for increasing SSDs' performance, which is named HAMM(Hybrid Address Mapping Method). HAMM addresses drawbacks of previous block-mapping method and super-block-mapping method and takes advantages of them. We experimented our method on our own SSDs simulator. In the experiments, we confirmed that HAMM uses storage area more efficiently than super-block-mapping method, given the same buffer size. In addition, HAMM used smaller memory than block-mapping method to construct mapping table, demonstrating almost same performance.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.2
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• pp.77-88
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• 2009

According to the size of NAND flash memory as the storage system of mobile device becomes large, the performance of address translation and life cycle management in FTL (Flash Translation Layer) to interact with file system becomes very important. In this paper, we propose the continuity counters, which represent the number of continuous physical blocks whose logical addresses are consecutive, to reduce the number of address translation. Furthermore we propose the prefetching method which preloads frequently accessed pages into main memory to enhance I/O performance of flash memory. Besides, we use the 2-bit write prediction and asynchronous writing method to predict addresses repeatedly referenced from host and prevent from writing overhead. The experiments show that the proposed method improves the I/O performance and extends the life cycle of flash memory. As a result, proposed CFTL (Clustered Flash Translation Layer)'s performance of address translation is faster 20% than conventional FTLs. Furthermore, CFTL is reduced about 50% writing time than that of conventional FTLs.