Journal of KIISE:Computer Systems and Theory (한국정보과학회논문지:시스템및이론)

Korean Institute of Information Scientists and Engineers (한국정보과학회)
권호 표지

Duplication-Aware Garbage Collection for Flash Memory-Based Virtual Memory Systems

플래시 메모리 기반의 가상 메모리 시스템을 위한 중복성을 고려한 GC 기법

  • 지승구 (성균관대학교 정보통신공학부) ;
  • 신동군 (성균관대학교 정보통신공학부)
  • Received : 2010.03.03
  • Accepted : 2010.04.05
  • Published : 2010.06.15
Download PDF
⟨ Previous Next ⟩

Abstract

As embedded systems adopt monolithic kernels, NAND flash memory is used for swap space of virtual memory systems. While flash memory has the advantages of low-power consumption, shock-resistance and non-volatility, it requires garbage collections due to its erase-before-write characteristic. The efficiency of garbage collection scheme largely affects the performance of flash memory. This paper proposes a novel garbage collection technique which exploits data redundancy between the main memory and flash memory in flash memory-based virtual memory systems. The proposed scheme takes the locality of data into consideration to minimize the garbage collection overhead. Experimental results demonstrate that the proposed garbage collection scheme improves performance by 37% on average compared to previous schemes.

임베디드 시스템이 모놀리식(monolithic) 커널을 사용하면서, NAND 플래시 메모리는 가상 메모리 시스템의 스왑(swap) 공간을 위해 사용되고 있다. 플래시 메모리는 저전력 소비, 충격 내구성, 비 휘발성의 장점을 가지지만, '쓰기 전 삭제'의 특징 때문에 가비지 컬렉션(GC) 작업이 필요하다. GC 기법의 효율성은 플래시 메모리 성능에 큰 영향을 미친다. 본 논문에서는 플래시 메모리를 기반으로 하는 가상 메모리 시스템에서 메인 메모리와 플래시 메모리 사이에 중복된 데이터를 활용한 새로운 GC 기법을 제안한다. 제안된 기법은 GC 부하를 최소화하기 위해 데이터의 지역성을 고려한다. 실험 결과는 제안된 GC 기법이 이전의 기법과 비교하여 평균적으로 37%의 성능을 향상시킴을 보여준다.

Keywords

References

  1. C. Park, J. Kang, S. Park, and J. Kim, "Energy- aware demand paging on NAND flash-based embedded storages," In Proc. International Symposium on Low Power Electronics and Design, pp.338-343, 2004.
  2. Y. Joo, Y. Choi, C. Park, S. W. Chung, E.-Y. Chung, and N. Chang, "Demand paging for One NAND flash eXecute-In-Place," In Proc. CODES+ ISSS'06, pp.229-234, 2006.
  3. J. In, I. Shin, and H. Kim, "SWL: A Search- While-Load demand paging scheme with NAND flash memory," In Proc. Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), pp.217-225, 2007.
  4. Intel Corporation, "Understanding the flash translation layer (FTL) specification," http://developer.intel.com/.
  5. CompactFlash Association, http://www.compactflash.org/.
  6. H.-L. Li, C-L. Yang, H-W. Tseng, "Energyaware flash memory management in virtual memory system," IEEE Trans. Very Large Scale Integration System, 16(8):952-964, 2008. https://doi.org/10.1109/TVLSI.2008.2000517
  7. A. Ban. Flash file system optimized for pagemode flash technologies, US Patent 5,937,425, Aug. 10, 1999.
  8. A. Ban. Flash file system, US Patent 5,404,485, Apr. 4, 1995.
  9. J. Kim, J. M. Kim, S. H. Noh, S. L. Min, and Y. Cho, "A space-efficient flash translation layer for compact flash systems," IEEE Trans. on Consumer Electronics, vol.48, no.2, pp.366-375, 2002. https://doi.org/10.1109/TCE.2002.1010143
  10. S. W. Lee, D. J. Park, T. S. Chung, W. K. Choi, D. H. Lee, S. W. Park, and H. J. Song, "A log buffer based flash translation layer using fully associative sector translation," ACM Trans. on Embedded Computing Systems, vol.6, no.3, 2007.
  11. C. I. Park, W. M. Cheon, J. G. Kang, K. H. Roh, W. H. Cho, and J. S. Kim, "A reconfigurable FTL (Flash Translation Layer) architecture for NAND flash-based applications," ACM Trans. on Embedded Computing Systems, vol.7, no.4, 2008.
  12. H. Jo, J. Kang, S. Park, J. Kim, and J. Lee, "FAB: Flash-aware buffer management policy for portable media players," IEEE Trans. On Consumer Electronics, vol.52, no.2, pp.485-493, 2006. https://doi.org/10.1109/TCE.2006.1649669
  13. S. Y. Park, D. Jung, J. U. Kang, J. S. Kim, and J. Lee, "CFLRU: A replacement algorithm for flash memory," In Proc. of the Int. Conf. on Compilers, Architecture and Synthesis for Embedded Systems, pp.234-241, 2006.
  14. H. Kim and S. Ahn, "BPLRU: A buffer management scheme for improving random writes in flash storage," In Proc. of the USENIX Conf. on File and Storage Technologies, pp.239-252, 2008.
  15. S. Lee, D. Shin, and J. Kim, "Buffer-aware garbage collection techniques for NAND flash memorybased storage systems," In Proc. of the Int. Work. on Software Support for Portable Storage (IWSSPS'08), pp.27-32, 2008.
  16. D. W. Jung, J. S. Kim, S. Y. Park, J. U. Kang, and J. Lee, "FASS: A flash-aware swap system," In Proc. of the Int. Work. on Software Support for Portable Storage (IWSSPS'05), 2005.
  17. O. Kwon, K. Koh, "Swap-aware garbage collection for NAND flash memory based embedded systems," In Proc. of the Seventh IEEE Int. Conf. on Computer and Information Technology, 2007.
  18. M. Wu and W. Zwaenepoel, "eNVy: A nonvolatile, main memory storage system," In Proc. of the Int. Conf. on Architectural Support for Programming Languages and Operating Systems, pp.86-97, 1994.
  19. Samsung Corp, "K9WBG08U1M NAND Flash Memory," 2007.
  20. N. Nethercote and J. Seward, "Valgrind: A framework for heavyweight dynamic binary instrumentation," SIGPLAN Not., vol.42, no.6, pp.89-100, 2007. https://doi.org/10.1145/1273442.1250746