• Title/Summary/Keyword: 캐리어백

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Research for a Development of the Test Equipment for Transmission Error of the Planetary Gear Carrier Pack (유성기캐리어팩 전달오차 측정 장비 개발에 관한 연구)

  • Lee, Hyun Ku;Do, Jong Gu;Yoo, Dong Kyu;Won, Kwang Min;Chung, Si Deuk;Lee, Tae Hwi
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2014.04a
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    • pp.348-349
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    • 2014
  • In general, there has been a lot of research concerned about the gear noise known to be proportional to gear transmission error for external gears likewise spur, helical gear, and hypoid gears. But, In the case of planetary gear set, gear noise study is insufficient because of the difficulty of designing, manufacturing, and understanding of the its mechanical system. This study is aimed to develop the transmission error measurement equipment for the planetary gear sets used in the automatic transmission. By comparing the results of the transmission error and noise objectively, user could select the optimized planetary gear set which has quiet noise level before manufacturing the automatic transmission.

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High Current Behavior and Double Snapback Mechanism Analysis of Gate Grounded Extended Drain NMOS Device for ESD Protection Device Application of DDIC Chip (DDIC 칩의 정전기 보호 소자로 적용되는 GG_EDNMOS 소자의 고전류 특성 및 더블 스냅백 메커니즘 분석)

  • Yang, Jun-Won;Kim, Hyung-Ho;Seo, Yong-Jin
    • Journal of Satellite, Information and Communications
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    • v.8 no.2
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    • pp.36-43
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    • 2013
  • In this study, the high current behaviors and double snapback mechanism of gate grounded_extended drain n-type MOSFET(GG_EDNMOS) device were analyzed in order to realize the robust electrostatic discharge(ESD) protection performances of high voltage operating display driver IC(DDIC) chips. Both the transmission line pulse(TLP) data and the thermal incorporated 2-dimensional simulation analysis as a function of ion implant conditions demonstrate a characteristic double snapback phenomenon after triggering of bipolar junction transistor(BJT) operation. Also, the background carrier density is proven to be a critical factor to affect the high current behavior of the GG_EDNMOS devices.

Design and Implementation of High Performance DFWMAC (DFWMAC의 고속처리를 위한 회로 설계 및 구현)

  • 김유진;이상민;정해원;이형호;기장근;조현묵
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.5A
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    • pp.879-888
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    • 2001
  • 본 논문에서는 무선 LAN의 MAC 계층 프로토콜을 고속으로 처리하는 MAC 기능 칩을 개발하였다. 개발된 MAC 칩은 CPU와의 인터페이스를 위한 제어 레지스터들과 인터럽트 체계를 가지고 있으며, 프레임 단위로 송수신 데이터를 처리한다. 또한 PFDM 방식 물리계층 모뎀을 위한 직렬전송 인터페이스를 가지고 있다. 개발된 MAC 칩은 크게 프로토콜제어기능 블록, 송신기능 블록 및 수신기능 블록 등으로 구성되었으며, IEEE 802.11 규격에 제시된 대부분의 DCF 기능을 지원한다. 구현된 MAC 칩의 동작을 검증하기 위해 RTS-CTS 절차 기능, IFS(Inter Frame Space) 기능, 액세스 절차, 백오프 절차, 재전송 기능, 분할된(fragmented) 프레임 송수신 기능, 중복수신 프레임 검출 기능, 가상 캐리어 검출기능(NAV 기능), 수신에러 발생 경우 처리 기능, Broadcast 프레임 송수신 기능, Beacon 프레임 송수신 기능, 송수신 FIFO 동작 기능 등을 시뮬레이션을 통해 시험하였으며, 시험 결과 모두 정상적으로 동작함을 확인하였다. 본 논문을 통해 개발된 MAC 기능 칩을 이용할 경우 고속 무선 LAN 시스템의 CPU 부하(load)와 펌웨어의 크기를 크게 줄일 수 있을 것으로 기대된다.

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A Study on Staircase PWN Inverter Using Power MOS FET (POWER MOS FET를 사용한 계단파 PWN 인버터에 관한 연구)

  • 이성백;구용회;이종규
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.1 no.2
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    • pp.70-73
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    • 1987
  • This paper itltroduces a simple stair-case PWM using the pseudo-sinusoidal method. In a configuration of controller, the value of sine as a fundamental factor divided into stair-case level and the three-phase PWM inverter is composed by digital compound for each value of stair-case level. The three-phase output pulse at a fixed carrier frequency and a variable reference frequency is obtained under the effect of reduced harmonics. In this experiment, using the power FET as the switching device, 0.5 H.P. induction motor operation is performed when the switching frequency is 20KHz.

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고능률 고정밀 래핑 장비의 개발

  • 김동석;하상백;이상직
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2004.05a
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    • pp.33-33
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    • 2004
  • 래핑은 상하정반 사이에 공작물과 공작물을 지지할 수 있는 캐리어를 삽입하여 유성치차운동 방식으로 가공하는 것으로, 오래 전부터 산업전반에 걸쳐 널리 사용되어 왔다. 래핑의 특징은 한번에 많은 수의 공작물을 가공할 수 있어 가공능률이 우수하고, 높은 형상 정밀도를 확보할 수 있을 뿐만 아니라 가공부의 표면 거칠기가 양호하고 가공 변질층이 작다는 이점을 가지고 있다. 특히 박판 형상의 가공물이나 경도에 비해 강도가 취약한 경취성 재질의 가공물을 정밀하고 효과적으로 가공할 수 있기 때문에 최근에는 정밀 기계산업 분야 이외에도 광통신 산업, 반도체 산업, 디스플레이 산업 등에서 그 활용이 점차 증가하고 있는 추세이다.(중략)

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Large grain을 가지는 LTPS TFT의 Gate bias stress에 따른 소자의 특성 변화 분석

  • Yu, Gyeong-Yeol;Lee, Won-Baek;Jeong, U-Won;Park, Seung-Man;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.429-429
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    • 2010
  • TFT 제조 방법 중 LTPS (Low Temperature Polycrystalline Silicon)는 저온과 저비용 등의 이점으로 인하여 flat panel display 제작에 널리 사용된다. 이동도와 전류 점멸비 등에서 이점을 가지는 ELA(Excimer Laser Annealing)가 널리 사용되고 있지만, 이 방법은 uniformity 등의 문제점을 가지고 있다. 이를 극복하기 위한 방법으로 MICC(Metal Induced Capping Crystallization)이 사용되고 있다. 이 방법은 $SiN_x$, $SiO_2$, SiON등의 capping layer를 diffusion barrier로 위치시키고, Ni 등의 금속을 capping layer에 도핑 한 뒤, 다시 한번 열처리를 통하여 a-Si에 Ni을 확산시키킨다. a-Si 층에 도달한 Ni들이 seed로 작용하여 Grain size가 매우 큰 film을 제작할 수 있다. 채널의 grain size가 클 경우 grain boundary에 의한 캐리어 scattering을 줄일 수 있기 때문에 MIC 방법을 사용하였음에도 ELA에 버금가는 소자의 성능과 안정성을 얻을 수있었다. 본 연구에서는 large grain TFT의 Gate bias stress에 따른 소자의 안정성 측정 및 분석에 목표를 두었다.

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Design of Digital PWM Controller for Voltage Source Inverter (전압형 인버터를 위한 디지털 PWM 제어기 설계)

  • 이성백;이종규;정구철
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.7 no.3
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    • pp.27-33
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    • 1993
  • This paper presents the &tal controller for driving high frequency voltage fed PWM inverter that carrier frequency is over 2OkHz.We analyzed the conventional PWM to select a proper PWM pattern. as the result, obtained PWM pattern of the controller in which asynchronus staircase sinusoidal waveform is used as reference signal, and variable carrier ratio method was used for PWM control. The PWM controller is designed by fully digital method. Especially, Thk proposed controller is consisted of 8 bit one-chip microprocessor and digital logic. the former is for arithmetic and data processing, and the latter is for PWM pattern synthesis. Therefore, The responsibility and controllability is improved. Also, Data processing capability is improved using proper program to output modulation index with 9 bits. Circuits configuration of digital controller are made up of one chip 8051 and EPLD, and its controllability is tested by operating voltage fed inverter. Harmonics and current waveform is evaluated and analyzed for the voltage fed inverter system.

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Electrical response of tungsten diselenide to the adsorption of trinitrotoluene molecules (폭발물 감지 시스템 개발을 위한 TNT 분자 흡착에 대한 WSe2 소자의 전기적 반응 특성 평가)

  • Chan Hwi Kim;Suyeon Cho;Hyeongtae Kim;Won Joo Lee;Jun Hong Park
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.33 no.6
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    • pp.255-260
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    • 2023
  • As demanding the detection of explosive molecules, it is required to develop rapidly and precisely responsive sensors with ultra-high sensitivity. Since two-dimensional semiconductors have an atomically thin body nature where mobile carriers accumulate, the abrupt modulation carrier in the thin body channel can be expected. To investigate the effectiveness of WSe2 semiconductor materials as a detection material for TNT (Trinitrotoluene) explosives, WSe2 was synthesized using thermal chemical vapor deposition, and afterward, WSe2 FETs (Field Effect Transistors) were fabricated using standard photo-lithograph processes. Raman Spectrum and FT-IR (Fourier-transform infrared) spectroscopy reveal that the adsorption of TNT molecules induces the structural transition of WSe2 crystalline. The electrical properties before and after adsorption of TNT molecules on the WSe2 surface were compared; as -50 V was applied as the back gate bias, 0.02 μA was recorded in the bare state, and the drain current increased to 0.41 μA with a dropping 0.6% (w/v) TNT while maintaining the p-type behavior. Afterward, the electrical characteristics were additionally evaluated by comparing the carrier mobility, hysteresis, and on/off ratio. Consequently, the present report provides the milestone for developing ultra-sensitive sensors with rapid response and high precision.

A Study on the PWN Inverter for the Design of UPS (무정전 전원(UPS)설계를 위한 PWN 인버터에 관한 연구)

  • 이성백;구용회;이종규
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.2 no.2
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    • pp.59-63
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    • 1988
  • In a fixed AC power source the PWM techniques were used to vary the voltage and the fundamental frequency. The conventional PWM techniques due to the problem of commutation number and filter size have been studied the PWM output waveforms which applied the motor drive. However in this paper, the carrier frequency with sinusoidal PWM waveform is modulated from 10(KHz) to 45(KHz) using termination devices with high - speed switching capacity and applying LPF(Low Pass Filter) with small capacity to output of inverter and the PAM(Pulse Amplitude Modulation)is obtained. Considering the property of the speed and the control, the sinusoidal PWM control circuit was composed of the microprocessor and analog circuit. In experment result, the system properties are study on the sinusoidal voltage waveform with modulation index changing from 0.6 to 1.0.

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Leakage Current of Hydrogenated Amorphous Silicon Thin-Film Transistors (수소화된 비정질규소 박막트랜지스터의 누설전류)

  • Lee, Ho-Nyeon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.4
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    • pp.738-742
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    • 2007
  • The variations in the device characteristics of hydrogenated amorphous thin-film transistors (a-Si:H TFTs) were studied according to the processes of pixel electrode fabrication to make active-matrix flat-panel displays. The off-state current was about 1 pA and the switching ratio was over $10^6$ before fabrication of pixel electrodes; however, the off-state current increased over 10 pA after fabrication of pixel electrodes. Surface treatment on SiNx passivation layers using plasma could improve the off-state characteristics after pixel electrode process. $N_2$ plasma treatment gave the best result. Charge accumulation on the SiNx passivation layer during the deposition of transparent conducting layer might cause the increase of off-state current after the fabrication of pixel electrodes.

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