• Journal of the Earthquake Engineering Society of Korea
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• v.13 no.4
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• pp.67-76
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• 2009

Recently, the active interaction control (AIC) system was proposed as a semi-active control system. The AIC system consists of a primary structure and an auxiliary structure. The objective of the AIC system is to control the response of the primary structure through engagement and disengagement between the primary and auxiliary structures. Previous switching control algorithms have been shown to be effective in reducing the response of the primary structure. However, they have the main drawback of requiring an excessive engagement-disengagement frequency and high interaction force. In this paper, the regions in which the switching is activated and the regions in which the switching is deactivated are described separately, to effectively determine the engagement or the disengagement. The general relationship between the switching regions and the deactivated switching regions selected according to the engagement-disengagement conditions is described within the newly-developed comprehensive switching framework. The proposed engagement-disengagement conditions are designed within a comprehensive switching framework, to reduce engagement-disengagement frequency and interaction force. Furthermore, the effect of a control sampling period on the AIC system is explained in terms of the engagement-disengagement frequency. The effectiveness of the proposed algorithms and the effect of the control sampling period are considered for a single degree of freedom model under free vibration. It is observed that increasing the duration of stay by using a large control sampling period prevents the AIC system from activating the possible chance of switching. The proposed algorithms are shown to be effective, both in restricting ineffective switching and in reducing interaction force.

• Journal of the Korean Institute of Intelligent Systems
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• v.25 no.2
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• pp.139-146
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• 2015

This paper presents the solution to model matching of switched asynchronous sequential machines by corrective control. We propose a model of switched asynchronous sequential machines, in which the system can have different dynamics of asynchronous machines governed by a pre-determined sequence of switching. The control objective is to derive a corrective control law so that the stable state behavior of the closed-loop system can match that of a prescribed model. A new skeleton matrix is defined to represent the reachability of the switched asynchronous machine, and a novel control scheme is presented that interweaves the switching signal and the corrective control procedure. A design algorithm for the proposed controller is illustrated in a case study.

• Proceedings of the KIEE Conference
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• 2002.07d
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• pp.2102-2104
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• 2002

Batch estimation 알고리듬은 수집된 표적에 대한 모든 정보들을 사용하여 상태변수의 초기값을 추정하게 되며 그 구간동안 표적이 일정한 속도로 움직이고 표적 음원의 주파수는 그 값이 항상 일정하다는 가정을 했다. 본 논문에서는 이러한 가정을 위배하는 표적 음원의 주파수 변화에 대해 대처하기 위한 각도와 주파수정보를 이용하는 Batch estimation 알고리듬과 각도정보만을 사용하는 Batch estimation 알고리듬의 경우를 표적 음원의 주파수 변화를 감지하여 스위칭 할 수 있는 방법에 대해 알아본다.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.385-388
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• 2005

본 논문에서는 코로나 방전 처리를 위해서 PDM에 의한 전압원 직렬공진인버터의 제어와 동작을 위한 알고리듬을 제안한다. PDM 인버터는 동작주파수와 일정 DC 전압 상태에서 평균 출력 전력을 제어하기 위해서 AC 출력단자에 구형파 AC 전압과 영전압 상태를 생성한다. 또한 스위칭 손실의 최소화를 위해서 영전류 스위칭과 영전압 스위칭을 모든 동작 상태에서 이루어짐을 보인다. 또한 강한 비선형적인 특성을 가진 코로나 방전 부하에 대하여 $5%{\sim}100%$의 폭 넓은 방전 전력을 제어함을 보인다.

• Journal of the Korea Society of Computer and Information
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• v.7 no.2
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• pp.79-86
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• 2002

This paper presents a low power scheduling and allocation algorithm for multiple supply voltage. The proposed supply voltage scheduling algorithm determines the control step to execute a possible the operation experimentally using another supply voltage level. Also, the switching activity using component library. and the supply voltage allocation method uses the graph coloring technique for low power, the proposed algorithm Proves the effect through various high level benchmark examples to adopt a multiple supply voltage scheduling algorithm for low power.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.10A
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• pp.1546-1554
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• 1999

In this paper, Dynamic Fault Tree algorithm(DFT algorithm) is presented. This algorithm provides a concise representation of dynamic fault tolerance system including fault recovery techniques with fault detection, mask and switching function. And this algorithm define FDEP, CSP, SEQ, PAG gate which captures the dynamic characteristics of system. It show that this algorithm solved the constraints to satisfy the dynamic characteristics of system which there are in Markov and also this is able to satisfy the dynamic characteristics of system which there are in Markov and also this is able to covered the disadvantage of Fault tree methods. To show the key advantage of this algorithm, a traditional method, that is, Markov and Fault Tree, applies to TMR and Dual-Duplex systems with the dynamic characteristic and a presented method applies to those. He results proved that the DFT algorithm for solving the problems of the system is more effective than the Markov and Fault tree analysis model..

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.11C
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• pp.1132-1138
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• 2002

This paper proposes a reducing power consumption of a scheduling algorithm for optimal selection of supply voltage. In scheduling of reduction power consumption, we determine the control steps of operations to be executed by exploiting the possibility of using variable voltage levels to reduce power consumption. In the optimal selection of supply voltage binding, we minimize the main factor of the power consumption of the switching activity on the registers using a graph coloring technique. From a set of experiments using high-level benchmark examples, we show that the proposed algorithm prefer to use optimal selection supply voltages rather than uniformed single voltage is effective in reducing power consumption.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.2
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• pp.106-112
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• 2007

This paper proposes a hybrid architecture algorithm for fast computation of DCT and DFT via recursive factorization. Recursive factorization of DCT-II and DFT transform matrix leads to a similar architectural structure so that common architectural base may be used by simply adding a switching device. Linking between two transforms was derived based on matrix recursion formula. Hybrid acrchitectural design for DCT and DFT matrix decomposition were derived using the generation matrix and the trigonometric identities and relations. Data flow diagram for high-speed architecture of Cooley-Tukey type was drawn to accommodate DCT/DFT hybrid architecture. From this data flow diagram computational complexity is comparable to that of the fast DCT algorithms for moderate size of N. Further investigation is needed for multi-mode operation use of FFT architecture in other orthogonal transform computation.

• Journal of KIISE
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• v.42 no.6
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• pp.748-754
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• 2015

This paper proposes a sequential state estimation model consisting of continuous and discrete variables, as a way of generalizing all discrete-state factorial HMM, and gives a design of gait motion model based on the idea. The discrete state variable implements a Markov chain that models the gait dynamics, and for each state of the Markov chain, we created a Gaussian process over the space of the continuous variable. The Markov chain controls the switching among Gaussian processes, each of which models the rotation or various views of a gait state. Then a particle filter-based algorithm is presented to give an approximate filtering solution. Given an input vector sequence presented over time, this finds a trajectory that follows a Gaussian process and occasionally switches to another dynamically. Experimental results show that the proposed model can provide a very intuitive interpretation of video-based gait into a sequence of poses and a sequence of posture states.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.9A
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• pp.1091-1100
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• 2004

In this paper, we present a reducing power conswnption of a scheduling for module selection under the time constraint. The proposed low power scheduling executes FDS_LP considering low power to exist the FDS scheduling by inputted the behavioral language. The proposed FDS_LP perfonns lower power consumption with dynamic power which is minimized the switching activity, based on force conception In the time step of module selection, an optimal RT(Register Transfer) library is composed by exploration of the parameters such as power, area, and delay. To find optimal parameters of RT library, an optimal module selection algorithm using Branch and Bound algorithm is also proposed. In the comparison and experimental results, The proposed FDS_LP algorithm reduce maximum power saving up to 23.9% comparing to previous FDS algorithm.