• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2359-2368
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• 2013

In this paper, an IRD (internal read data) circuit preventing the reentry into the read mode while keeping the read-out DOUT datum at power-up even if noise such as glitches occurs at signal ports such as an input signal port RD (read) when a power IC is on, is proposed. Also, a pulsed WL (word line) driving method is used to prevent a DC current of several tens of micro amperes from flowing into the read transistor of a differential paired eFuse OTP cell. Thus, reliability is secured by preventing non-blown eFuse links from being blown by the EM (electro-migration). Furthermore, a compared output between a programmed datum and a read-out datum is outputted to the PFb (pass fail bar) pin while performing a sensing margin test with a variable pull-up load in consideration of resistance variation of a programmed eFuse in the program-verify-read mode. The layout size of the 8-bit eFuse OTP IP with a $0.18{\mu}m$ process is $189.625{\mu}m{\times}138.850{\mu}m(=0.0263mm^2)$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.1
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• pp.115-122
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• 2014

In this paper, reliability is secured by sensing a post-program resistance of several tens of kilo ohms and restricting a read current flowing over an unblown eFuse within $100{\mu}A$ since RWL driver and BL pull-up load circuits using a regulated voltage of V2V ($=2V{\pm}10%$) are proposed to have a wide operating voltage range for eFuse OTP memory. Also, when a comparison of a cell array of 1 row ${\times}$ 32 columns with that of 4 rows ${\times}$ 8 columns is done, the layout size of 4 rows ${\times}$ 8 columns is smaller with $187.065{\mu}m{\times}94.525{\mu}m$ ($=0.01768mm^2$) than that of 1 row ${\times}$ 32 columns with $735.96{\mu}m{\times}61.605{\mu}m$ ($=0.04534mm^2$).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.1
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• pp.53-60
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• 2004

This work describes a l0b 150 MSample/s CMOS pipelined A/D converter (ADC) based on advanced bootsuapping techniques for higher input bandwidth than a sampling rate. The proposed ADC adopts a typical multi-step pipelined architecture, employs the merged-capacitor switching technique which improves sampling rate and resolution reducing by $50\%$ the number of unit capacitors used in the multiplying digital-to-analog converter. On-chip current and voltage references for high-speed driving capability of R & C loads and on-chip decimator circuits for high-speed testability are implemented with on-chip decoupling capacitors. The proposed AU is fabricated in a 0.18 um 1P6M CMOS technology. The measured differential and integral nonlinearities are within $-0.56{\~}+0.69$ LSB and $-1.50{\~}+0.68$ LSB, respectively. The prototype ADC shows the signal-to-noise-and-distortion ratio (SNDR) of 52 dB at 150 MSample/s. The active chip area is 2.2 mm2 (= 1.4 mm ${\times}$ 1.6 mm) and the chip consumes 123 mW at 150 MSample/s.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.6
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• pp.239-245
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• 2016

In this study, a 12 V PWM boost converter was designed with the optimal values of the external components of the power stage was well as the compensation stage for smart electronic applications powered by a battery device. The 12 V boost PWM converter consisted of several passive elements, such as a resistor, inductor and capacitor with a diode, power MOS switch and control IC chip for the control PWM signal. The devices of the power stage and compensation stage were designed to maintain stable operation under a range of load conditions as well as achieving the highest power efficiency. The results of this study were first verified by a simulation in SPICE from calculations of the values of major external elements comprising the converter. The design was also implemented on the prototype PCBboard using commercial IC LM3481 from Texas Instruments, which has a nominal output voltage of 12 V. The output voltage, ripple voltage, and load regulation with the line regulation were measured using a digital oscilloscope, DMM tester, and DC power supply. By configuring the converter under the same conditions as in the circuit simulation, the experimental results matched the simulation results.

• Applied Chemistry for Engineering
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• v.7 no.2
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• pp.237-244
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• 1996

Liquid-liquid extractions by use of microporous hollow fiber modules are fast compared with conventional extraction equipment because of the large surface area per volume. In these modules, the extractant and feed can be contacted at high speed and two flows are completely independent, so there are no problems with loading and channeling. In this paper, it was investigated the extraction selectivities for liquid-liquid extraction of Fe(II) and Ni(II) from dilute aqueous solution into TOA (tri-n-octylamine) and EHPNA (bis(2-ethylhexyle)hydrogenphosphite) as organic extractants by using the hydrophobic hollow fiber module. To determine the rate controlling step for mass transfer in hollow fibers, we also examined the effect of inside and outside flow rates of the hollow fiber module. From these experiments, we identified for the extraction of system with high partition coefficient in hydrophobic hollow fibers, mass transfer in the inside aqueous feed dominated the overall mass transfer, and in this paper, correlation between $K_w$ and $v_t$ was obtained as $K_w{\frac{d}{D}}=6.22\(\frac{d^2v_t}{LD}\)^{1/3}$ On the other hand, for the system with low partition coefficient, the resistance in the inside of hollow fibers was much less than membrane resistance because the extraction was not simple in the micropore. Thus, for systems with high partition coefficients, hydrophobic hollow fibers would be a better choice.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.2
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• pp.71-80
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• 1999

In this paper, a power MOSFET driver with protection circuits is designed using a 2${\mu}m$ high-voltage CMOS process. For stable operations of control circuits a power managing circuit is designed, and a voltage-detecting short-circuit protection(VDSCP) is proposed to protect a voltage regulator in the power control circuit. The proposed VDSCP scheme eliminates voltage drop caused by a series resistor, and turns off output current under short-circuit state. To protect a power MOSFET, a short-load protection, a gate-voltage limiter, and an over-voltage protection circuit are also designed A high voltage 2 ${\mu}m$ technology provides the breakdown voltage of 50 V. The driver consumes the power of 20 ~ 100 mW along its operation state excluding the power of the power MOSFET. The active area of the power MOSFET driver occupies $3.5 {\times}2..8mm^2$.

• Journal of the Korean Society for Nondestructive Testing
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• v.21 no.6
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• pp.618-629
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• 2001

This paper presents a result of failure analysis and reliability evaluation for high voltage ceramic capacitors. The failure modes and failure mechanisms were studied in two ways in order to estimate component life and failure rate. The causes of failure mechanisms for zero resistance phenomena under withstanding voltage test in high voltage ceramic capacitors molded by epoxy resin were studied by establishing an effective root cause failure analysis. Particular emphasis was placed on breakdown phenomena at the ceramic-epoxy interface. The validity of the results in this study was confirmed by the results of accelerated testing. Thermal cycling test for high voltage ceramic capacitor mounted on a magnetron were implemented. Delamination between ceramic and epoxy, which might cause electrical short in underlying circuitry, can occur during curing or thermal cycle. The results can be conveniently used to quickly identify defective lots, determine $B_{10}$ life estimation each lot at the level of inspection, and detect major changes in the vendors processes. Also, the condition for dielectric breakdown was investigated for the estimation of failure rate with load-strength interference model.

• Proceedings of the Korea Water Resources Association Conference
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• 2005.05b
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• pp.1214-1218
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• 2005

지금까지 국내에서의 수질개선을 위한 노력은 점오염원에 대한 저감만을 중심으로 진행되어 왔기 때문에, 보다 획기적인 수질개선을 위해서는 비점오염에 대한 연구와 관리가 진행되어야 한다. 그러므로 본 연구에서는 도시지역, 농촌지역, 임야지역의 토지이용특성이 다른 3유역을 대상으로 현장연구를 실시하여 비점오염물질의 발생특성 및 유역별 비교를 실시하였다. 측정은 도시지역의 가장 큰 오염원인 CSOs(Combined Sewer Overflows)에 대하여 측정을 실시하였고, 농촌지역 및 임야지역의 경우 각 유역의 출구 지점에서 측정을 실시하였다. 강우특성이 다른 15개의 강우사상을 대상으로 유량 및 SS, TCOD, TN, TP의 항목에 대하여 한 강우사상당 $15\~20$회의 측정을 실시하였다. 각각의 강우사상에 대하여 EMCs(Event Mean Concentrations)를 산출하여 도시지역, 농촌지역, 임야지역의 각 유역에 대한 확률별 EMCs를 산정한 결과 3개 유역의 EMCs는 도시지역>농촌지역>임야지역 순으로 나타났다. $EMC_{TCOD}$는 도시지역과 농촌임야지역간에 가장 큰 차이를 보이는 것으로 나타났으며, $EMC_{TN}$에서 가장 작은 차이가 나타났다. 각 유역별 EMCs의 로그-정규 확률그래프의 분산계수를 비교한 결과 농촌임야지역은 도시지역에 비하여 오염물질의 농도 변화가 강우특성에 따라 보다 큰 변화를 보이는 것으로 나타났다. 연구유역에서 $EMC_{TN}$의 발생확률 $50\% 값이 도시지역은 17.0mg/L, 농촌임야지역은 4.5mg/L로 나타났으며, 이는 유사한 유역특성을 나타내는 타 지역에서의 연구자료를 분석 값과 매우 유사한 크기를 가지는 것으로 나타났다.를 분석하였다. 실험을 수행하여 보다 정밀한 공식으로 개선할 수 있었다.$10,924m^3/s$ 및 $10,075m^3/s$로서 실험 I의 $2,757m^3/s$에 비해 통수능이 많이 개선되었음을 알 수 있다.함을 알 수 있다. 상수관로 설계 기준에서는 관로내 수압을 $1.5\~4.0kg/cm^2$으로 나타내고 있는데 $6kg/cm^2$보다 과수압을 나타내는 경우가 $100\%$로 밸브를 개방하였을 때보다 $60\%,\;80\%$ 개방하였을 때가 더 빈번히 발생하고 있으므로 대상지역의 밸브 개폐는 $100\%$ 개방하는 것이 선계기준에 적합한 것으로 나타났다. 밸브 개폐에 따른 수압 변화를 모의한 결과 밸브 개폐도를 적절히 유지하여 필요수량의 확보 및 누수방지대책에 활용할 수 있을 것으로 판단된다.8R(mm)(r^2=0.84)$로 지수적으로 증가하는 경향을 나타내었다. 유거수량은 토성별로 양토를 1.0으로 기준할 때 사양토가 0.86으로 가장 작았고, 식양토 1.09, 식토 1.15로 평가되어 침투수에 비해 토성별 차이가 크게 나타났다. 이는 토성이 세립질일 수록 유거수의 저항이 작기 때문으로 생각된다. 경사에 따라서는 경사도가 증가할수록 증가하였으며 $10\% 경사일 때를 기준으로 $Ro(mm)=Ro_{10}{\times}0.797{\times}e^{-0.021s(\%)}$로 나타났다.천성 승모판 폐쇄 부전등을 초래하는 심각한 선천성 심질환이다. 그러나 진단 즉시 직접 좌관상동맥-대동맥 이식술로 수술적 교정을 해줌으로써 좋은 성적을 기대할 수 있음을 보여주었다.특히 교사들이 중요하게 인식하는 해

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.6-12
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• 2010

A sigma-delta modulator based class-D audio amplifier is presented. Parallel digital input is serialized to two-bit output by a fourth-order digital sigma-delta noise shaper. The output of the digital sigma-delta noise shaper is applied to a fourth-order analog sigma-delta modulator whose three-level output drives power switches. The pulse density modulated (PDM) output of the power switches is low-pass filtered by an LC-filter. The PDM output of the power switches is fed back to the input of the analog sigma-delta modulator. The first integrator of the analog sigma-delta modulator is a hybrid of continuous-time (CT) and switched-capacitor (SC) integrator. While the sampled input is applied to SC path, the continuous-time feedback signal is applied to CT path to suppress the noise of the PDM output. The class-D audio amplifier is fabricated in a standard $0.13-{\mu}m$ CMOS process and operates for the signal bandwidth from 100-Hz to 20-kHz. With 4-${\Omega}$ load, the maximum output power is 18.3-mW. The total harmonic distortion plus noise and dynamic range are 0.035-% and 80-dB, respectively. The modulator consumes 457-uW from 1.2-V power supply.

• Journal of Life Science
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• v.18 no.9
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• pp.1230-1238
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• 2008

The purposes of this study was to identify the effects of regular training on body composition, bone mineral density and growth factors by taekwondo training program in the children. Subjects were aged 11$\sim$13 years. There was classified two groups (experiment group 12, control group 12), total 24. Measured items for this study were body composition (weight, percent body fat, body mass index), lumbar (L2, L3, L4), femur (neck, trochanter, ward's triangles) bone mineral density and growth factors (growth hormone, IGF-I, IGFBP-III) in the 12weeks before and after. Results of this study were as follows; In the body composition, there were showed significant differences on the weight, percent body fat and body mass index level between groups. In the bone mineral density, there were showed significant differences on the lumbar 2, 3, and femur neck, femur trochanter, femur ward's triangles level between groups. In the growth factors, there were showed significant differences on the growth hormone, IGF-I, and IGFBP-III level between groups. This study showed that an 12weeks taekwondo training program affected in a positive effects in almost of items in trained children.