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http://dx.doi.org/10.6109/jkiice.2014.18.1.115

Design of eFuse OTP Memory with Wide Operating Voltage Range for PMICs  

Jeong, Woo-Young (Department of Electronic Engineering, Changwon National University)
Hao, Wen-Chao (Department of Electronic Engineering, Changwon National University)
Ha, Pan-Bong (Department of Electronic Engineering, Changwon National University)
Kim, Young-Hee (Department of Electronic Engineering, Changwon National University)
Abstract
In this paper, reliability is secured by sensing a post-program resistance of several tens of kilo ohms and restricting a read current flowing over an unblown eFuse within $100{\mu}A$ since RWL driver and BL pull-up load circuits using a regulated voltage of V2V ($=2V{\pm}10%$) are proposed to have a wide operating voltage range for eFuse OTP memory. Also, when a comparison of a cell array of 1 row ${\times}$ 32 columns with that of 4 rows ${\times}$ 8 columns is done, the layout size of 4 rows ${\times}$ 8 columns is smaller with $187.065{\mu}m{\times}94.525{\mu}m$ ($=0.01768mm^2$) than that of 1 row ${\times}$ 32 columns with $735.96{\mu}m{\times}61.605{\mu}m$ ($=0.04534mm^2$).
Keywords
PMIC; analog trimming; eFuse; wide operating voltage; High-reliability;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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