• Journal of IKEEE
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• v.25 no.1
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• pp.101-108
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• 2021

This paper proposes a parallel control method of a modular DC/DC converter for electric vehicle (EV) chargers. The EV chargers have been increasing the power capacity using modular converters. There are output current imbalances between the modules, which are caused by the difference of the impedance, delay of the gate driver, and error of the sensors. The conventional strategies for the equal distribution of the output current cause the voltage drop or the high volume and cost of the converters. Therefore, the proposed parallel control strategy effectively balances the output current of modules using a current compensation method. The proposed strategy is verified by simulations. Additional experimental results will be added under various conditions.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.1
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• pp.40-47
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• 2022

At present, the low-voltage, high-current type power supply is mainly used for effective sterilization in the ballast water treatment system. Research on PSFB converters without output capacitors has been ongoing. Such converters effectively treat ballast water without a separate disinfectant through electric pulses by applying a pulse-type power to the output electrode without an output capacitor. However, in the case of the pulse-type electrolysis treatment method, voltage overshoot can occur due to abrupt voltage fluctuations when the load changes, resulting in circuit reliability problems because of the output capacitorless system. Therefore, a new voltage control algorithm is required. In this paper, we will discuss voltage control for pulsed electrolysis topology without an output capacitor. The proposed voltage control method has been verified using Simulation and experiment. The usefulness of the proposed control method has been proven by the experimental results.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.161-165
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• 2023

This paper designed a voltage feedback driving circuit to compensate for the characteristic deviation of the Active Matrix Organic Light Emitting Diode driving Thin Film Transistor. This paper describes a stable and fast circuit by applying charge sharing and polar stabilization methods. A 12-inch Organic Light Emitting Diode with a Double Wide Ultra eXtended Graphics Array resolution creates a screen distortion problem for line parasitism, and charge sharing and polar stabilization structures were applied to solve the problem. By applying Charge Sharing, all data lines are shorted at the same time and quickly positioned as the average voltage to advance the compensated change time of the gate voltage in the next operation period. A buffer circuit and a current pass circuit were added to lower the Amplifier resistance connected to the line as a polar stabilization method. The advantage of suppressing the Ringing of the driving Thin Film Transistor can be obtained by increasing the stability. As a result, a circuit was designed to supply a stable current to the Organic Light Emitting Diode even if the characteristic deviation of the driving Thin Film Transistor occurs.

• Korean Journal of Optics and Photonics
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• v.22 no.1
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• pp.23-29
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• 2011

Bistable chiral splay nematic liquid crystal display (BCSN LCD) is a memory type liquid crystal display using splay and $-\pi$ twist states as two stable states. When the cell thickness to pitch (d/p) ratio is 0.25, splay and $-\pi$ twist states have permanent memory time. However, when the transition from $-\pi$ twist state to splay state is caused by a fringe field, pixel regions show that the splay state is not perfect, but rather includes a contribution from the $-\pi$ twist state. In this paper, we propose a reflective BCSN LCD using $-\pi$ twist state in which the two stable states do not coexist. The fabricated reflective BCSN LC cell shows a high contrast ratio of over 30:1 and response times of 950 ms and 450 ms in vertical and fringe field switching, respectively. The proposed cell also shows wide viewing angle characteristics of $180^{\circ}$ in left- and right directions.

• Investigative Magnetic Resonance Imaging
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• v.13 no.1
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• pp.15-21
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• 2009

Purpose : A method to estimate a real k-space trajectory based on a circuit model of the gradient system is proposed for spiral imaging. The estimated k-space trajectory instead of the ideal trajectory is used in the reconstruction to improve the image quality in the spiral imaging. Materials and Methods : Since the gradient system has self resistance, capacitance, and inductance, as well as the mutual inductance between the magnet and the gradient coils, the generated gradient fields have delays and transient responses compared to the input waveform to the gradient system. The real gradient fields and their trajectory in k-space play an important role in the reconstruction. In this paper, the gradient system is modeled with R-L-C circuits, and real gradient fields are estimated from the input to the model. An experimental method to determine the model parameters (R, L, C values) is also suggested from the quality of the reconstructed image. Results : The gradient fields are estimated from the circuit model of the gradient system at 1.5 Tesla MRI system. The spiral trajectory obtained by the integration of the estimated gradient fields is used for the reconstruction. From experiments, the reconstructed images using the estimated trajectory show improved uniformity, reduced overshoots near the edges, and enhanced resolutions compared to those using the ideal trajectory without model. Conclusion : The gradient system was successfully modeled by the R-L-C circuits. Much improved reconstruction was achieved in the spiral imaging using the trajectory estimated by the proposed model.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.94-99
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• 2010

This paper presents a charge pump architecture for correcting the current mismatch due to the PVT variation. In general, the current mismatch of the charge pump should be minimized to improve the phase noise and spur performance of the PLL. In order to correct the current mismatch of the charge pump, the current difference is detected by the replica charge pump and fed back into the main charge pump. This scheme is very simple and guarantees the high accuracy compared with the prior works. Also, it shows a good dynamic performance because the mismatch is corrected continuously. It is implemented in 0.13um CMOS process and the die area is $100{\mu}m\;{\times}\;160{\mu}m$. The voltage swing is from 0.2V to 1V at supply voltage of 1.2V. The charging and discharging currents are $100{\mu}A$, respectively and the current mismatch due to the PVT variation is less than 1%.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.122-130
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• 2013

This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.

• Journal of Embryo Transfer
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• v.21 no.1
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• pp.35-43
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• 2006

Ions play important roles in various cellular processes including fertilization and differentiation. However, it is little known whether how ions are regulated during early embryonic development in mammalian animals. In this study, we examined changes in $Ca^{2+}\;and\;K^+$ concentrations in embryos and oviduct during mouse early embryonic development using patch clamp technique and confocal laser scanning microscopy. The intracellular calcium concentration in each stage embryos did not markedly change. At 56h afier hCG injection when 8-cell embryos could be Isolated from oviduct, $K^+$ concentration in oviduct increased by 26% compared with that at 14h after injection of hCG During early embryonic development, membrane potential was depolarized (from -38 mV to -16 mV), and $Ca^{2+}$ currents decreased, indicating that some $K^+$ channel might control membrane potential in oocytes. To record the changes in membrane potential induced by influx of $Ca^{2+}$ in mouse oocytes, we applied 5 mM $Ca^{2+}$ to the bath solution. The membrane potential transiently hyperpolarized and then recovered. In order to classify $K^+$ channels that cause hyperpolarization, we first applied TEA and apamin, general $K^+$ channel blockers, to the bath solution. Interestingly, the hyperpolarization of membrane potential still appeared in oocytes pretreated with TEA and apamin. This result suggest that the $K^+$ channel that induces hyperpolarization could belong to another $K^+$ channel such as two-pore domain $K^+(K_{2P})$channel that a.e insensitive to TEA and apamin. From these results, we suggest that the changes in $Ca^{2+}\;and\;K^+$ concentrations play a critical role in cell proliferation, differentiation and reproduction as well as early embryonic development, and $K_{2P}$ channels could be involved in regulation of membrane potential in ovulated oocytes.

• Polymer(Korea)
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• v.33 no.5
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• pp.496-500
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• 2009

Optically compensated bend liquid crystal display (OCB-LCD) has many application fields owing to its fast response time and wide viewing angle. However, in order to operate the OCB-LCD in bend state, this device needs quick transitions from the initial splay state to bend state. Unlike conventional approach using transient high voltage for the transition, the OCB-LCD with high surface tilt angle, which was achieved by polymerization of UV curable reactive mesogen monomer under certain voltage, was manufactured and the cell showed bend state initially. Electro-optic and electrical characteristics of the cell were analyzed. The cell shows a fast response time owing to high surface pretilt angle and very low residual DC less than 0.1 V although another polymer layer is formed above polymer alignment layers.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.2
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• pp.309-316
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• 2019

In this paper, a low-jitter delay-locked loop that compensates for local clock skew is presented. The proposed DLL consists of a phase splitter, a phase detector(PD), a charge pump, a bias generator, a voltage-controlled delay line(VCDL), and a level converter. The VCDL uses self-biased delay cells using current mode logic(CML) to have insensitive characteristics to temperature and supply noises. The phase splitter generates two reference clocks which are used as the differential inputs of the VCDL. The PD uses the only single clock from the phase splitter because the PD in the proposed circuit uses CMOS logic that consumes less power compared to CML. Therefore, the output of the VCDL is also converted to the rail-to-rail signal by the level converter for the PD as well as the local clock distribution circuit. The proposed circuit has been designed with a $0.13-{\mu}m$ CMOS process. A global CLK with a frequency of 1-GHz is externally applied to the circuit. As a result, after about 19 cycles, the proposed DLL is locked at a point that the control voltage is 597.83mV with the jitter of 1.05ps.