• 한국세라믹학회지
• /
• 제47권6호
• /
• pp.618-622
• /
• 2010

Cost-effective purification methods of silicon were carried out in order to replace the conventional Siemens method for solar grade silicon. Firstly, acid leaching which is a hydrometallurgical process was preceded with grinded silicon powders of metallurgical grade (~99% purity) to remove metallic impurities. Then, plasma treatments were performed with the leached silicon powders of 99.94% purity by argon plasma at 30 kW power under atmospheric pressure. Plasma treatment was specifically efficient for removing Zr, Y, and P but not for Al and B. Another purification step by EB treatment was also studied for the 99.92% silicon lump which resulted in the fast removal of boron and aluminum. That means the two methods are effective alternative tools for removing the doping elements like boron and phosphor.

• 대한금속재료학회지
• /
• 제48권7호
• /
• pp.660-666
• /
• 2010

30 nm thick Ni layers were deposited on a glass substrate by e-beam evaporation. Subsequently, 30 nm or 60 nm ${\alpha}-Si:H$ layers were grown at low temperatures ($<220^{\circ}C$) on the 30 nm Ni/Glass substrate by catalytic CVD (chemical vapor deposition). The sheet resistance, phase, microstructure, depth profile and surface roughness of the $\alpha-Si:H$ layers were examined using a four-point probe, HRXRD (high resolution Xray diffraction), Raman Spectroscopy, FE-SEM (field emission-scanning electron microscopy), TEM (transmission electron microscope) and AES depth profiler. The Ni layers reacted with Si to form NiSi layers with a low sheet resistance of $10{\Omega}/{\Box}$. The crystallinty of the $\alpha-Si:H$ layers on NiSi was up to 60% according to Raman spectroscopy. These results show that both nano-scale NiSi layers and crystalline Si layers can be formed simultaneously on a Ni deposited glass substrate using the proposed low temperature catalytic CVD process.

• 한국산학기술학회논문지
• /
• 제8권1호
• /
• pp.25-32
• /
• 2007

코발트 니켈 합금형 실리사이드 공정에서 단결정실리콘과 다결정실리콘 기판에 자연산화막이 있는 경우 나노급 두께의 코발트 니켈 합금 금속을 증착하고 실리사이드화하는 경우의 반응 안정성을 확인하였다. 4인치 P-type(100)Si 기판 전면에 poly silicon을 입힌 기판과 single silicon 상태의 두 종류 기판을 준비하고 두께 4 nm의 자연산화막이 있는 상태에서 10 nm 코발트 니켈 합금을 니켈의 상대조성을 $10{\sim}90%$로 달리하며 열증착하였다. 통상의 600, 700, 800, 900, 1000, $1100^{\circ}C$ 각 온도에서 실리사이드화 열처리를 시행 후 잔류 합금층을 제거하고, XRD(X-ray diffraction)및 FE-SEM(Field emission scanning electron microscopy), AES(Auger electron spectroscopy)를 사용하여 실리사이드가 생겼는지 확인하였다. 마이크로라만 분석기로 실리사이드 반응시의 실리콘 층의 잔류 스트레스도 확인하였다. 자연산화막이 존재하는 경우 실리사이드 반응이 진행되지 않았고, 폴리실리콘 기판과 고온에서는 금속과 산화층의 반응잔류물이 생성되었다. 단결정 기판의 고온열처리에서는 실리사이드 반응이 없더라도 핀홀이 발생할 수 있는 정도의 열스트레스가 존재하였다. 코발트 니켈 복합실리사이드 공정에서는 자연산화막을 제거하는 공정이 필수적이었다.

• 한국광물학회지
• /
• 제27권3호
• /
• pp.149-158
• /
• 2014

손상된 석조문화재 보존을 위한 다양한 강화제가 개발되고 있다. 강화제의 종류에는 에폭시계, 이크릴계, 이소시아네이트계, 알콕시실란계 등이 있다. 본 연구에 사용된 강화제는 1T1G_5 wt 0.08 %로 T (TEOS: Tetraethyl Orthosilicate)와 G (GPTMS: 3-Glycidoxy propyl trimethoxy silane)로 알콕시실란계이다. 강화제 처리 결과 처리 전 쇼어경도값이 낮은 높아지며, 색도 변화는 강화제 처리 후 초기에는 약간 어두워지지만 시간이 지남에 따라 원래의 밝기로 환원된다. 초음파 속도 변화는 강화제 처리 후 초기에는 증가하지만 시간이 지남에 따라 약간 감소하여 일정하게 유지된다. 초음파 속도 증가에 대한 효율은 풍화가 많이 진행되어 초음파 속도가 느린 암석일수록 강화효율이 높다.

• 대한금속재료학회지
• /
• 제49권4호
• /
• pp.313-320
• /
• 2011

100 nm-thick hydrogenated amorphous silicon $({\alpha}-Si:H)$ films were deposited on a glass and glass/30 nm Ni substrates by inductively-coupled plasma chemical vapor deposition (ICP-CVD) at temperatures ranging from 100 to $550^{\circ}C$. The sheet resistance, microstructure, phase transformation and surface roughness of the films were characterized using a four-point probe, AFM (atomic force microscope), TEM (transmission electron microscope), AES (Auger electron spectroscopy), HR-XRD(high resolution X-ray diffraction), and micro-Raman spectroscopy. A nano-thick NiSi phase was formed at substrate temperatures >$400^{\circ}C$. AFM confirmed that the surface roughness did not change as the substrate temperature increased, but it increased abruptly to 6.6 nm above $400^{\circ}C$ on the glass/30 nm Ni substrates. HR-XRD and micro-Raman spectroscopy showed that all the Si samples were amorphous on the glass substrates, whereas crystalline silicon appeared at $550^{\circ}C$ on the glass/30 nm Ni substrates. These results show that crystalline NiSi and Si can be prepared simultaneously on Ni-inserted substrates.

• 한국신재생에너지학회:학술대회논문집
• /
• 한국신재생에너지학회 2011년도 춘계학술대회 초록집
• /
• pp.104.1-104.1
• /
• 2011

가볍고, 유연성(flexibility)을 갖는 박막(thin film)형 플랙서블 태양전지(flexible solar cell)는 상황에 따른 형태의 변형이 가능하여, 휴대가 간편하고, 기존 혹은 신규 구조물의 지붕(rooftop)등에 설치가 용이하여, 차세대 성장 동력 분야에서 각광받고 있다. 그러나 아직까지 플랙서블 태양전지는 제작시 열에 의한 기판의 변형, 기판 이송시 너울 현상, 대면적 패터닝(patterning) 기술 등 많은 어려움 등으로 웨이퍼나 글라스 기판에 제조된 태양전지 대비 낮은 광전환 효율을 갖는다. 따라서 본 연구에서는 플랙서플 태양전지 성능개선을 위해 3.5세대급 ($450{\times}450cm^2$) 스퍼터(sputter), 금속유기 화학기상장치 (MOCVD), 플라즈마 화학기상장치 (PECVD), 레이저 가공장치 (Laser scriber)를 이용하여 a-Si:H/a-SiGe:H 이중접합(tandem)을 갖는 태양전지를 제작하였고, 광 변환효율 특성을 평가하였다. 전도도(conductivity), 라만(Raman)분광 및 UV/Visible 분광 분석을 통하여 박막의 전기적, 구조적, 광학적 물성을 평가하여 단위박막의 물성을 최적화 했다. 또한 제작된 태양전지는 쏠라 시뮬레이터 (Solar Simulator)를 이용하여 성능 평가를 수행하였고, 상/하부층의 전류 정합 (current matching)을 위해 외부양자효율 (external quantum efficiency) 분석을 수행하였다. 제작된 이중접합 접이식 태양전지로 소면적($0.25cm^2$)에서 8.7%, 대면적($360cm^2$ 이상) 8.0% 이상의 효율을 확보하였으며, 성능 개선을 위해 대면적 패턴 기술 향상 및 공정 기술 개선을 수행 중이다.

• 대한금속재료학회지
• /
• 제46권11호
• /
• pp.762-769
• /
• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• 대한금속재료학회지
• /
• 제47권5호
• /
• pp.322-329
• /
• 2009

60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.