• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.12
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• pp.867-871
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• 2013

The Ti adhesion layers were deposited onto the glass substrate for transparent capacitors using $Bi_2Mg_{2/3}Nb_{4/3}O_7$ (BMNO) dielectric thin films. Graphene was transferred onto the Ti/glass substrate after growing onto the Ni/$SiO_2$/Si using rapid-thermal pulse CVD (RTPCVD). The BMNO dielectric thin films were investigated for the microstructure, dielectric and leakage properties in the case of capacitors with and without Ti adhesion layers. Leakage current and dielectric properties were strongly dependent on the Ti adhesion layers grown for graphene bottom electrode.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.8
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• pp.53-61
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• 1994

Intermetallic dielectric layer was formed by using SiO$_2$/SOG/SiO$_2$ for aluminum based dual-metal interconnection process and its electric characteristics were evaluated. The dielectric layer was in the cost and facility point of view more useful than the insulator that was formed by etch-back process. The planarity by using SOG process was about 40% higher than that of the insulator by the CVD process. When SiO$_2$ films were deposited by the PECVD process the Al hillock formation during the next process was restrained bucause the intermetalic insulator was made at low temperature. The leakage current was 1${\times}10^{7}~1{\times}10^{-8}A/cm^{2}$ at the electric field of 10$^{5}$V/cm and breakdown filed was 4.5${\times}10^{6}~7{\times}10^{6}A/cm$. So we had confirmed that siloxane SOG was very useful for intermetallic layer material.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.2
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• pp.101-106
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• 2009

In this paper, Thin films of $HfO_2$/Hf were deposited on p-type wafer by Atomic Layer Deposition (ALD). We studied the electrical and material characteristics of $HfO_2$/Hf/Si MOS capacitor depending on thickness of Hf metal layer. $HfO_2$ films were deposited using TEMAH and $O_3$ at $350^{\circ}C$. Samples were then annealed using furnace heating to $500^{\circ}C$. Round-type MOS capacitors have been fabricated on Si substrates with $2000\;{\AA}$-thick Pt top electrodes. The composition rate of the dielectric material was analyzed using TEM (Transmission Electron Microscopy), XRD (X-ray Diffraction) and XPS (X-ray Photoelectron Spectroscopy). Also the capacitance-voltage (C-V), conductance-voltage (G-V), and current-voltage (I-V) characteristics were measured. We calculated the density of oxide trap charges and interface trap charges in our MOS device. At the interface between $HfO_2$ and Si, both Hf-Si and Hf-Si-O bonds were observed, instead of Si-O bond. The sandwiched Hf metal layer suppressed the growing of $SiO_x$ layer so that $HfSi_xO_y$ layer was achieved. And finally, the generation of both oxide trap charge and interface trap charge in $HfO_2$ film was reduced effectively by using Hf metal layer.

• Journal of the Korean Ceramic Society
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• v.40 no.2
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• pp.198-205
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• 2003

$Ba_{0.66}Sr_{0.34}TiO_3$ thin films and seed-layers were deposited on $Pt/Ti/SiO_2/Si$substrate by R.F. magnetron sputtering method. Effects of various substrate temperature conditions on electrical properties (such as capacitance and leakage current) of BST thin films were studied. The effect of seed-layer was also studied. When seed-layer was inserted between BST and Pt, the crystallization of the BST thin films was considerably improved and the processing temperature was lowered. Compared to the pure BST thin films, dielectric constant, dielectric loss, and leakage current of BST thin films deposited on the seed-layer were considerably improved. It could be revealed that electrical properties are influenced by the substrate temperatures of BST thin films and are enhanced by the seed-layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.263-266
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• 2001

In this paper, we investigated dielectric properies for BST thin films that was deposited on MgO/Si substrates using RF magnetron sputtering. In here, MgO film was used to perform that a diffusion b arrier between the BST film and Si substrate and a buffer layer to assist the BST film growth. A d eposition condition for MgO films was RF Power of 50W, substrate temperature of room temperature and the working gas ratio of Ar:O$_2$ were varied from 90:10 to 60:47. Finally we manufactured the cap acitor of Al/BST/MgO/Si/Al structure to know electrical properties of this capacitor through I-V, C-V measurement. In the results, C-V aha racteristic curves was shown a ferroelectric property so we measured P-E. A remanent poliazation and coerceive electric field was present 2$\mu$C/cm$^2$ and -27kV/cm respectively at Ar:O$_2$=90:10. And a va clue of dielectric constant was 86 at Ar:02=90:10.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2013.05a
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• pp.97-97
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• 2013

We present a comprehensive study on the integration of h-BN with silicon MOSFET. Temperature dependent mobility modeling is used to discern the effects of top-gate dielectric on carrier transport and identify limiting factors of the system. The result indicates that coulomb scattering and surface roughness scattering are the dominant scattering mechanisms for silicon MOSFETs at relatively low temperature. Interposing a layer of h-BN between $SiO_2$ and Si effectively weakens coulomb scattering by separating carriers in the silicon inversion layer from the charged centers as 2-dimensional h-BN is relatively inert and is expected to be free of dangling bonds or surface charge traps owing to the strong, in-plane, ionic bonding of the planar hexagonal lattice structure, thus leading to a significant improvement in mobility relative to undecorated system. Furthermore, the atomically planar surface of h-BN also suppresses surface roughness scattering in this Si MOSFET system, resulting in a monotonously increasing mobility curve along with gate voltage, which is different from the traditional one with a extremum in a certain voltage. Alternatively, high-k dielectrics can lead to enhanced transport properties through dielectric screening. Modeling indicates that we can achieve even higher mobility by using h-BN decorated $HfO_2$ as gate dielectric in silicon MOSFETs instead of h-BN decorated $SiO_2$.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.11 no.1
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• pp.38-42
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• 2001

Electric and dielectric(Ba,Sr)$TiO_3$[BST] thin films for emtal-Insulator-Semiconductor(MIS) capacitors have been studied. BST thin films wre deposted on p-Si(100) substrates bythe RF magnetron sputtering with tempratue range of 500~$600^{\circ}C$. The dielectric properties of MIS capacitors consisting of Al/BST/$SiO_2$/Si sandwich structure were evaluated ot redcue the leakage current density. The charge state densities of the MIS capacitors were determined by high frequency (1 MHz) C-V measurement. In order to reduce the leakage current in MIS capacitor, high quality $SiO_2$ layer was deposited on bare p-Si substrate. Depending on the oxygen pressure and substrate temperature both positive and negative polarities of effective oxide charge in the MIS capacitors were evaluated. It is considered that the density of electronic states, generated at the BST/$SiO_2$/p-Si interface due to the asymmetric structure within BST/$SiO_2$/Si structure, and the oxygen vacancy content has influence on the behavior of oxide charge.

• Journal of the Korean Vacuum Society
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• v.10 no.1
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• pp.27-30
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• 2001

Electromigration Phenomena in Al-1%Si thin film interconnections under DC and PDC conditions were investigated. Thin film interconnections with $SiO_2$ and PSG/$SiO_2$ dielectric passivation layer were formed by a standard photolithography process method and test line lengths were 100, 400, 800, 1200, and 1600 $\mu\textrm{m}$. The current density of $1.19\times10^7\textrm{A/cm}^2$ was stressed in Al-1%Si thin film interconnections under DC condition. The current density of $1.19\times10^7\textrm{A/cm}^2$ was also applied under PDC condition at the frequency of 1 Hz with the duty factor of 0.5. The electromigration resistance of PSG/SiO2 dielectric passivation test line was stronger than $SiO_2$ dielectric passivation test line. The lifetime under PDC was 2-4 times longer than DC condition. As the thin film interconnection line increased, the lifetime decreased and saturated over the critical length. Failure patterns by an electromigration were dominated by void-induced electrical open and hillock-induced electrical short.

• Electrical & Electronic Materials
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• v.8 no.2
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• pp.129-135
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• 1995

SiO thin films are deposited by evaporator the refractive index of wave length, photon energy and the absorptive rate of these films are measured by spectroscopic ellipsometer. It is derived the absorptive rate and permitivity of SiO thin films from the equations that calculating the refractive index. And the result show good agreement with the calculated values and experimental values. As a result, the wave length of light is increased in the condition that the angle of incidence is fixed on SiO thin film, the basic absorption and the absorption impurities are found in the low wave length (below 450 nm in this study) and the reflective absorption and conductive absorption is increased by the form of exponential function over the low wavelength. The absorptive rate is increased by increased the angle of incidence and thickness of SiO film for the insulating layer. As the thickness of SiO film is increased, the value of complex permitivity is decreasing and as wave length of incidence is increased., the value of dielectric is linearly increasing.

• Electrical & Electronic Materials
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• v.7 no.2
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• pp.145-151
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• 1994

The multi-dielectric layer SiOz/Si3N4/SiO2(ONO) is used to scale down the memory device. In this paper, the change of composition in ONO layer due to the process condition and the conduction mechanism are observed. The composition of the oxide film grown through the oxidation of nitride film is analyzed using auger electron spectroscopy(AES). AES results show that oxygen concentration increases at the interface between oxide and nitride layers as the thickness -of the top oxide layer increases. Results of I-V measurement show that the insulating properties improve as the thickness of the top oxide layer increases. But when the thickness of the nitride layer decreases below 63.angs, insulating peoperties of film 28.angs. of top oxide and film 35.angs. turn over showing that insulating property of film 28.angs. of top oxide is better than that of film 35.angs. of top oxide. This phenomenon of turn over is thought as the result of generation of surface state due to oxygen flow into nitride during oxidation process. As the thickness of the top oxide and nitride increases, the electrical breakdown field increases, but when the thickness of top oxide reaches 35.angs, the same phenomenon of turn over occurs. Optimum film thickness for scaled multi-layer dielectric of memory device SONOS is estimated to be 63.angs. of nitride layer and 28.angs. of top oxide layer. In this case, maximum electrical breakdown field and leakage current are 18.5[MV/cm] and $8{\times}{10^-12}$[A], respectively.