• Title/Summary/Keyword: $SiN_X$

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Importance of Gate $SiN_x$ Properties Related to a-Si:H TFT Instability

  • Tsai, Chien-Chien;Lee, Yeong-Shyang;Shih, Ching-Chieh;Hsu, Chung-Yi;Liang, Chung-Yu;Lin, Y.M.;Gan, Feng-Yuan
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.711-714
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    • 2006
  • Properties of silicon nitride ($SiN_x$) film including physical and electrical characteristics have been studied for improving the stability of hydrogenated amorphous silicon thin-film transistors (a-Si TFTs) in active-matrix liquid-crystal displays (AMLCDs). The instability of a-Si:H TFTs is estimated by accelerated stress test of both bias-temperature stress and bias-illumination stress. The results show that the deposition conditions of $SiN_x$ films with higher power and lower pressure are the best choice for improving the on-current and stability of TFTs.

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Characteristics of Low Temperature SiNx Films Deposited by Using Highly Diluted Silane in Nitrogen (고희석 SiH4 가스를 이용하여 증착한 저온 PECVD 실리콘 질화물 박막의 기계적, 전기적 특성연구)

  • No, Kil-Sun;Keum, Ki-Su;Hong, Wan-Shick
    • Korean Journal of Metals and Materials
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    • v.50 no.8
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    • pp.613-618
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    • 2012
  • We report on electrical and mechanical properties of silicon nitride ($SiN_x$) films deposited by a plasma enhanced chemical vapor deposition (PECVD) method at $200^{\circ}C$ from $SiH_4$ highly diluted in $N_2$. The films were also prepared from $SiH_4$ diluted in He for comparison. The $N_2$ dilution was also effective in improving adhesion of the $SiN_x$ films, fascilitating construction of thin film transistors (TFTs). Metal-insulator-semiconductor (MIS) and Metal-insulator-Metal (MIM) structures were used for capacitance-voltage (C-V) and current-voltage (I-V) measurements, respectively. The resistivity and breakdown field strength of the $SiN_x$ films from $N_2$-diluted $SiH_4$ were estimated to be $1{\times}10^{13}{\Omega}{\cdot}cm$, 7.4 MV/cm, respectively. The MIS device showed a hysteresis window and a flat band voltage shift of 3 V and 0.5 V, respectively. The TFTs fabricated by using these films showed a field-effect mobility of $0.16cm^2/Vs$, a threshold voltage of 3 V, a subthreshold slope of 1.2 V/dec, and an on/off ratio of > $10^6$.

Mechanical Property Evaluation of Dielectric Thin Films for Flexible Displays using Organic Nano-Support-Layer (유기 나노 보강층을 활용한 유연 디스플레이용 절연막의 기계적 물성 평가)

  • Oh, Seung Jin;Ma, Boo Soo;Yang, Chanhee;Song, Myoung;Kim, Taek-Soo
    • Journal of the Microelectronics and Packaging Society
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    • v.28 no.3
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    • pp.33-38
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    • 2021
  • Recently, rollable and foldable displays are attracting great attention in the flexible display market due to their excellent form factor. To predict and prevent the mechanical failure of the display panels, it is essential to accurately understand the mechanical properties of brittle SiNx thin films, which have been used as an insulating film in flexible displays. In this study, tensile properties of the ~130 nm- and ~320 nm-thick SiNx thin films were successfully measured by coating a ~190 nm-thick organic nano-support-layer (PMMA, PS, P3HT) on the fragile SiNx thin films and stretching the films as a bilayer state. Young's modulus values of the ~130 nm and ~320 nm SiNx thin films fabricated through the controlled chamber pressure and deposition power (A: 1250 mTorr, 450 W/B: 1000 mTorr, 600 W/C: 750 mTorr, 700 W) were calculated as A: 76.6±3.5, B: 85.8±4.6, C: 117.4±6.5 GPa and A: 100.1±12.9, B: 117.9±9.7, C: 159.6 GPa, respectively. As a result, Young's modulus of ~320 nm SiNx thin films fabricated through the same deposition condition increased compared to the ~130 nm SiNx thin films. The tensile testing method using the organic nano-support-layer was effective in the precise measurement of the mechanical properties of the brittle thin films. The method developed in this study can contribute to the robust design of the rollable and foldable displays by enabling quantitative measurement of mechanical properties of fragile thin films for flexible displays.

Characteristics of polycrystalline AlN thin films deposited on 3C-SiC buffer layers for M/NEMS applications (3C-SiC 버퍼층위에 증착된 M/NEMS용 다결정 AlN 박막의 특성)

  • Chung, Gwiy-Sang;Lee, Tae-Won
    • Journal of Sensor Science and Technology
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    • v.16 no.6
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    • pp.462-466
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    • 2007
  • Aluminum nitride (AlN) thin films were deposited on Si substrates by using polycrystalline (poly) 3C-SiC buffer layers, in which the AlN film was grown by pulsed reactive magnetron sputtering. Characteristics of grown AlN films were investigated experimentally by means of FE-SEM, X-ray diffraction, and FT-IR, respectively. The columnar structure of AlN thin films was observed by FE-SEM. X-ray diffraction pattern proved that the grown AlN film on 3C-SiC layers had highly (002) orientation with low value of FWHM (${\Theta}=1.3^{\circ}$) in the rocking curve around (002) reflections. These results were shown that almost free residual stress existed in the grown AlN film on 3C-SiC buffer layers from the infrared absorbance spectrum. Therefore, the presented results showed that AlN thin films grown on 3C-SiC buffer layers can be used for various piezoelectric fields and M/NEMS applications.

Roles of i-SiC Buffer Layer in Amorphous p-SiC/i-SiC/i-Si/n-Si Thin Film Solar Cells (비정질 p-SiC/i-SiC/i-Si/n-Si 박막 태양전지에서 i-SiC 완충층의 역할)

  • Kim, Hyun-Chul;Shin, Hyuck-Jae;Lee, Jae-Shin
    • Korean Journal of Materials Research
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    • v.9 no.12
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    • pp.1155-1159
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    • 1999
  • Thin film solar cells on a glass/$SnO_2$ substrate with p-SiC/i-Si/n-Si heterojunction structures were fabricated using a plasma-enhanced chemical-vapor deposition system. The photovoltaic properties of the solar cells were examined with varying the gas phase composition, x=$CH_4/\;(SiH_4+CH_4)$, during the deposition of the p-SiC layer. In the range of x=0~0.4, the efficiency of solar cell increased because of the increased band gap of the p-SiC window layer. Further increase in the gas phase composition, however, led to a decrease in the cell efficiency probably due to in the increased composition mismatch at the p-SiC/i-Si layers. As a result, the efficiency of a glass/$SnO_2$/p-SiC/i-SiC/i-Si/n-Si/Ag thin film solar cell with $1cm^2$ area was 8.6% ($V_{oc}$=0.85V, $J_{sc}$=16.42mA/$cm^2$, FF=0.615) under 100mW/$cm^2$ light intensity.

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Synthesis of $\alpha$-Sialon Ceramics from an Alkoxide and Their Mechanical Properties(I) (알콕사이드로부터 $\alpha$-Sialon 세라믹스의 제조 및 기계적 성질(I))

  • 이홍림;윤창현;조덕호
    • Journal of the Korean Ceramic Society
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    • v.28 no.2
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    • pp.130-140
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    • 1991
  • The powders of the system Si3N4-Y2O3-AlN were prepared using Si(OC2H5)4 and YCl3.6H2O together with commercial AlN powder. $\alpha$-Si3N4 was prepared by the carbothermal reduction and nitridation of the hydrolyzed gel at 135$0^{\circ}C$ for 10h in N2 atmosphere. YCl3.6H2O was observed to be changed to Y2O3 during the reaction. $\alpha$-Sialon(X=0.2, 0.4, 0.6) ceramics were obtained by hot-pressing the Si3N4-Y2O3-AlN mixture at 178$0^{\circ}C$ for 1h under 30 MPa. The content of $\alpha$-Sialon increased with increasing metal solubility(x value) and $\alpha$-Sialon single phase was obtained at the metal solubility of 0.6. With increasing metal solubility, flexural strength, fracture toughness and thermal shock resistence were decreased, while the microhardness was increased. Large elongated $\beta$-Si3N4 grains were mainly observed at lower metal solubility. Mechanical prorerties of the sintered ceramics with X=0.2 were measured as follows : flexural strength ; 650 MPa, fracture toughness ; 3.63 MN/m3/2, hardness ; 14.7 GPa, thermal shock resistence temperature ; 58$0^{\circ}C$.

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N-type Silicon Solar Cell Based on Passivation Layer Grown by Rapid Thermal Oxidation (Rapid Thermal Oxidation 기반의 표면 보호막을 이용한 n-type 실리콘 태양전지의 제작과 전기적 특성 분석)

  • Ryu, Kyungsun;Kim, Sung-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.1
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    • pp.18-21
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    • 2013
  • $SiO_2$ layer grown by rapid thermal oxidation and $SiN_x$ layer were used for passivating the surface of n-type silicon solar cell, instead of only $SiN_x$ layer generally used in photovoltaic industry. The rapid thermal oxidation provides the reduction of processing time and avoids bulk life time degradation during the processing. Improvement of 30 mV in Voc and $2.7mA/cm^2$ in Jsc was obtained by applying these two layers. This improvement led to fabrication of a large area ($239cm^2$) n-type solar cell with 17.34% efficiency. Internal quantum efficiency measurement indicates that the improvement comes from the front side passivation, but not the rear side, by using $SiO_2/SiN_x$ stack.

The NAND Type Flash EEPROM using the Scaled SCNOSFET (Scaled SONOSFET를 이용한 NAND형 Flash EEPROM)

  • Kim, Ju-Yeon;Kim, Byeong-Cheol;Kim, Seon-Ju;Seo, Gwang-Yeol
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.1
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    • pp.1-7
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    • 2000
  • The SNOSFET memory devices with ultrathin ONO(tunnel oxide-nitride-blocking oxide) gate dielectric were fabricated using n-well CMOS process and investigated its characteristics. The thicknesses of tunnel oxide, nitride and blocking oxide were $23{\AA},\; 53{\AA}\; and\; 33{\AA}$, respectively. Auger analysis shows that the ONO layer is made up of $SiO_2(upper layer of blocking oxide)/O-rich\; SiO_x\N\_y$. It clearly shows that the converting layer with $SiO_x\N\_y(lower layer of blocking oxide)/N-rich SiO_x\N\_y(nitride)/O-rich SiO_x\N\_y(tunnel oxide)$. It clearly shows that the converting layer with $SiO_x\N\_y$ phase exists near the interface between the blocking oxide and nitride. The programming condition of +8 V, 20 ms, -8 V, 50 ms is determined and data retention over 10 years is obtained. Under the condition of 8 V programming, it was confirmed that the modified Fowler-Nordheim tunneling id dominant charge transport mechanism. The programmed threshold voltage is distributed less than 0.1 V so that the reading error of memory stated can be minimized. An $8\times8$ NAND type flash EEPROM with SONOSFET memory cell was designed and simulated with the extracted SPICE parameters. The sufficient read cell current was obtained and the upper limit of $V_{TH}$ for write state was over 2V.

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Evaluation of Strength and Residual Stress in $Si_3N_4/SUS304$ Joint ($Si_3N_4/SUS304$ 접합재의 잔류응력 및 강도평가)

  • 박영철;오세욱;조용배
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.18 no.1
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    • pp.101-112
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    • 1994
  • The measurement of residual stress distribution of $Si_3N_4/SUS304$ joint was performed on 23 specimens with the same joint condition using PSPC type X-ray stress measurement system and the two-dimensional elastoplastic analysis using finite element method was also attempted. As results, residual stress distribution near the interface on the ceramic side of the joint was revealed quantitatively. Residual stress on the ceramic side of the joint was turned out to be tensional near the interface, maximum along the edge, varying in accordance with the condition of the joint and variance to be most conspicuous for the residual stress normal to the interface characterized by the stress singularities. In the vicinity of the interface, the high stress concentration occurs and residual stress distributes three-dimensionally. Therefore, the measured stress distribution differed remarkably from the result of the two-dimensional finite-element analysis. Especially at the center of the specimen near the interface, the residual stress, $\sigma_{x}$ obtained from the finite element analysis was compressive, whereas measurement using X-ray yielded tensile $\sigma_{x}$. Here we discuss two dimensional superposition model the discrepancy between the results from the two dimensional finite element analysis and X-ray measurement.

Improved SiNx buffer layer by Using the $N_2$ Plasma Treatment for TFT-FRAM applications ($N_2$ 플라즈마를 이용한 TFT-FRAM용 $SiN_x$ 버퍼층의 특성 개선)

  • Lim, Dong-Gun;Yang, Kea-Joon;Yi, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.360-363
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    • 2003
  • In this paper, we investigated SiNx film as a buffer layer of TFT-FRAM. Buffer layers were prepared by two step process of a $N_2$ plasma treatment and subsequent $SiN_x$ deposition. By employing $N_2$ plasma treatment, interface traps such as mobile charges and injected charges were removed, hysteresis of current-voltage curve disappeared. After $N_2$ plasma treatment, a leakage current was decreased about 2 orders. From these results, it is possible to perform the plasma treating process to make a good quality buffer layer of MFIS-FET or capacitor as an application of non-volatile memory.

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