• 제목/요약/키워드: $High-{\kappa}$ dielectric

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Low-operating voltage Pentacene FETs with High dielectric constant polymeric gate dielectrics and its hyteresis behavior

  • Park, Chan-Eon
    • 한국고분자학회:학술대회논문집
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    • 한국고분자학회 2006년도 IUPAC International Symposium on Advanced Polymers for Emerging Technologies
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    • pp.168-168
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    • 2006
  • Low-operating voltage organic field-effect transistors (OFETs) have been realized with high dielectric constant (${\kappa}$) polymer such as cyanoethylated poly vinyl alcohol (CR-V, ${\kappa}=12$). Since the $high-{\kappa}$polymers are likely to contain water and ionic impurities, large hysteresis and considerable leakage current are frequently observed in OFETs. To solve these problems, we cross-linked the CR-V by using a cross-linking agent. Cross-linked CR-V dielectrics showed high dielectric constant of 11.1 and good insulating properties, resulting in a high capacitance ($81nF/cm^{2}$ at 1MHz) at 120 nm of dielectric thickness. Pentacene FETs with cross-linked CR-V dielectrics exhibited high carrier mobility ($0.72\;cm^{2}/Vs$), small subthreshold swing (185 mV/dec) and little hysteresis at low-operating voltage (${\Leq}-3V$).

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The Pulsed Id-Vg methodology and Its Application to the Electron Trapping Characterization of High-κ gate Dielectrics

  • Young, Chadwin D.;Heh, Dawei;Choi, Ri-No;Lee, Byoung-Hun;Bersuker, Gennadi
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제10권2호
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    • pp.79-99
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    • 2010
  • Pulsed current-voltage (I-V) methods are introduced to evaluate the impact of fast transient charge trapping on the performance of high-k dielectric transistors. Several pulsed I-V measurement configurations and measurement requirements are critically reviewed. Properly configured pulsed I-V measurements are shown to be capable of extracting such device characteristics as trap-free mobility, trap-induced threshold voltage shift (${\Delta}V_t$), as well as effective fast transient trap density. The results demonstrate that the pulsed I-V measurements are an essential technique for evaluating high-$\kappa$ gate dielectric devices.

분광 타원계측기를 이용한 고굴절률 게이트 산화막의 광물성 분석 (Optical Properties of High-k Gate Oxides Obtained by Spectroscopic Ellipsometer)

  • 조용재;조현모;이윤우;남승훈
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2003년도 추계학술대회
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    • pp.1932-1938
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    • 2003
  • We have applied spectroscopic ellipsometry to investigate $high-{\kappa}$ dielectric thin films and correlate their optical properties with fabrication processes, in particular, with high temperature annealing. The use of high-k dielectrics such as $HfO_{2}$, $Ta_{2}O_{5}$, $TiO_{2}$, and $ZrO_{2}$ as the replacement for $SiO_{2}$ as the gate dielectric in CMOS devices has received much attention recently due to its high dielectric constant. From the characteristics found in the pseudo-dielectric functions or the Tauc-Lorentz dispersions, the optical properties such as optical band gap, polycrystallization, and optical density will be discussed.

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High-rate, Low-temperature Deposition of Multifunctional Nano-crystalline Silicon Nitride Films

  • Hwang, Jae-Dam;Lee, Kyoung-Min;Keum, Ki-Su;Lee, Youn-Jin;Hong, Wan-Shick
    • Journal of Information Display
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    • 제11권3호
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    • pp.109-112
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    • 2010
  • The solid phase compositions and dielectric properties of silicon nitride ($SiN_x$) films prepared using the plasma enhanced chemical vapor deposition (PECVD) technique at a low temperature ($200^{\circ}C$) were studied. Controlling the source gas mixing ratio, R = $[N_2]/[SiH_4]$, and the plasma power successfully produced both silicon-rich and nitrogen-rich compositions in the final films. The composition parameter, X, varied from 0.83 to 1.62. Depending on the film composition, the dielectric properties of the $SiN_x$ films also varied substantially. Silicon-rich silicon nitride (SRSN) films were obtained at a low plasma power and a low R. The photoluminescence (PL) spectra of these films revealed the existence of nano-sized silicon particles even in the absence of a post-annealing process. Nitrogen-rich silicon nitride (NRSN) films were obtained at a high plasma power and a high R. These films showed a fairly high dielectric constant ($\kappa$ = 7.1) and a suppressed hysteresis window in their capacitance-voltage (C-V) characteristics.

고유전율 필드 플레이트를 적용한 β-Ga2O3 쇼트키 장벽 다이오드 (Vertical β-Ga2O3 Schottky Barrier Diodes with High-κ Dielectric Field Plate)

  • 박세림;이태희;김희철;김민영;문수영;이희재;변동욱;이건희;구상모
    • 한국전기전자재료학회논문지
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    • 제36권3호
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    • pp.298-302
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    • 2023
  • In this paper, we discussed the effect of field plate dielectric materials such as silicon dioxide (SiO2), aluminum oxide (Al2O3), and hafnium oxide (HfO2) on the breakdown characteristics of β-Ga2O3 Schottky barrier diodes (SBDs). The breakdown voltage (BV) of the SBDs with a field plate was higher than that of SBDs without a field plate. The higher dielectric constant of HfO2 contributed to the superior reduction in electric field concentration at the Schottky junction edge from 5.4 to 2.4 MV/cm. The SBDs with HfO2 field plate showed the highest BV of 720 V, and constant specific on-resistance (Ron,sp) of 5.6 mΩ·cm2, resulting in the highest Baliga's figure-of-merit (BFOM) of 92.0 MW/cm2. We also investigated the effect of dielectric thickness and field plate length on BV.

Optimization of Gate Stack MOSFETs with Quantization Effects

  • Mangla, Tina;Sehgal, Amit;Saxena, Manoj;Haldar, Subhasis;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권3호
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    • pp.228-239
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    • 2004
  • In this paper, an analytical model accounting for the quantum effects in MOSFETs has been developed to study the behaviour of $high-{\kappa}$ dielectrics and to calculate the threshold voltage of the device considering two dielectrics gate stack. The effect of variation in gate stack thickness and permittivity on surface potential, inversion layer charge density, threshold voltage, and $I_D-V_D$ characteristics have also been studied. This work aims at presenting a relation between the physical gate dielectric thickness, dielectric constant and substrate doping concentration to achieve targeted threshold voltage, together with minimizing the effect of gate tunneling current. The results so obtained are compared with the available simulated data and the other models available in the literature and show good agreement.

Characterization of SWCNT Field Effect Transistor via Edison Simulation

  • Piao, Mingxing;Lee, Sang-Jin;Na, In-Yeob
    • EDISON SW 활용 경진대회 논문집
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    • 제2회(2013년)
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    • pp.260-263
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    • 2013
  • A semiconducting single-walled carbon nanotube (SWCNT) field-effect transistor (FET) in a top-gate model was constructed. The effect of different high-${\kappa}$ dielectric materials ($Al_2O_3$, $HfO_2$ and HfSiON) and various temperatures with a wide range from 50K to 500K on the performance of such nominal device were investigated. Several key device parameters including the on/off ratio of the current, transconductance ($g_m$), subthreshold swing, and carrier mobility were used to evaluate the device performance. The simulated results fit well with the experiment results previously published.

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Development of a Photoemission-assisted Plasma-enhanced CVD Process and Its Application to Synthesis of Carbon Thin Films: Diamond, Graphite, Graphene and Diamond-like Carbon

  • Takakuwa, Yuji
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.105-105
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    • 2012
  • We have developed a photoemission-assisted plasma-enhanced chemical vapor deposition (PAPE-CVD) [1,2], in which photoelectrons emitting from the substrate surface irradiated with UV light ($h{\nu}$=7.2 eV) from a Xe excimer lamp are utilized as a trigger for generating DC discharge plasma as depicted in Fig. 1. As a result, photoemission-assisted plasma can appear just above the substrate surface with a limited interval between the substrate and the electrode (~10 mm), enabling us to suppress effectively the unintended deposition of soot on the chamber walls, to increase the deposition rate, and to decrease drastically the electric power consumption. In case of the deposition of DLC gate insulator films for the top-gate graphene channel FET, plasma discharge power is reduced down to as low as 0.01W, giving rise to decrease significantly the plasma-induced damage on the graphene channel [3]. In addition, DLC thickness can be precisely controlled in an atomic scale and dielectric constant is also changed from low ${\kappa}$ for the passivation layer to high ${\kappa}$ for the gate insulator. On the other hand, negative electron affinity (NEA) of a hydrogen-terminated diamond surface is attractive and of practical importance for PAPECVD, because the diamond surface under PAPE-CVD with H2-diluted (about 1%) CH4 gas is exposed to a lot of hydrogen radicals and therefore can perform as a high-efficiency electron emitter due to NEA. In fact, we observed a large change of discharge current between with and without hydrogen termination. It is noted that photoelectrons are emitted from the SiO2 (350 nm)/Si interface with 7.2-eV UV light, making it possible to grow few-layer graphene on the thick SiO2 surface with no transition layer of amorphous carbon by means of PAPE-CVD without any metal catalyst.

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Atomic Layer Deposited ZrxAl1-xOy Film as High κ Gate Insulator for High Performance ZnSnO Thin Film Transistor

  • Li, Jun;Zhou, You-Hang;Zhong, De-Yao;Huang, Chuan-Xin;Huang, Jian;Zhang, Jian-Hua
    • Electronic Materials Letters
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    • 제14권6호
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    • pp.669-677
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    • 2018
  • In this work, the high ${\kappa}$ $Zr_xAl_{1-x}O_y$ films with a different Zr concentration have been deposited by atomic layer deposition, and the effect of Zr concentrations on the structure, chemical composition, surface morphology and dielectric properties of $Zr_xAl_{1-x}O_y$ films is analyzed by Atomic force microscopy, X-ray diffraction, X-ray photoelectron spectroscopy and capacitance-frequency measurement. The effect of Zr concentrations of $Zr_xAl_{1-x}O_y$ gate insulator on the electrical property and stability under negative bias illumination stress (NBIS) or temperature stress (TS) of ZnSnO (ZTO) TFTs is firstly investigated. Under NBIS and TS, the much better stability of ZTO TFTs with $Zr_xAl_{1-x}O_y$ film as a gate insulator is due to the suppression of oxygen vacancy in ZTO channel layer and the decreased trap states originating from the Zr atom permeation at the $ZTO/Zr_xAl_{1-x}O_y$ interface. It provides a new strategy to fabricate the low consumption and high stability ZTO TFTs for application.

Variation of the Si-induced Gap State by the N defect at the Si/SiO2 Interface

  • 김규형;정석민
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.128.1-128.1
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    • 2016
  • Nitrided-metal gates on the high-${\kappa}$ dielectric material are widely studied because of their use for sub-20nm semiconductor devices and the academic interest for the evanescent states at the Si/insulator interface. Issues in these systems with the Si substrate are the electron mobility degradation and the reliability problems caused from N defects that permeates between the Si and the $SiO_2$ buffer layer interface from the nitrided-gate during the gate deposition process. Previous studies proposed the N defect structures with the gap states at the Si band gap region. However, recent experimental data shows the possibility of the most stable structure without any N defect state between the bulk Si valence band maximum (VBM) and conduction band minimum (CBM). In this talk, we present a new type of the N defect structure and the electronic structure of the proposed structure by using the first-principles calculation. We find that the pair structure of N atoms at the $Si/SiO_2$ interface has the lowest energy among the structures considered. In the electronic structure, the N pair changes the eigenvalue of the silicon-induced gap state (SIGS) that is spatially localized at the interface and energetically located just above the bulk VBM. With increase of the number of N defects, the SIGS gradually disappears in the bulk Si gap region, as a result, the system gap is increased by the N defect. We find that the SIGS shift with the N defect mainly originates from the change of the kinetic energy part of the eigenstate by the reduction of the SIGS modulation for the incorporated N defect.

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