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http://dx.doi.org/10.5573/JSTS.2010.10.2.079

The Pulsed Id-Vg methodology and Its Application to the Electron Trapping Characterization of High-κ gate Dielectrics  

Young, Chadwin D. (SEMATECH)
Heh, Dawei (National Nano Device Laboratories)
Choi, Ri-No (Inha University)
Lee, Byoung-Hun (Gwangju Institute of Science and Technology)
Bersuker, Gennadi (SEMATECH)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.10, no.2, 2010 , pp. 79-99 More about this Journal
Abstract
Pulsed current-voltage (I-V) methods are introduced to evaluate the impact of fast transient charge trapping on the performance of high-k dielectric transistors. Several pulsed I-V measurement configurations and measurement requirements are critically reviewed. Properly configured pulsed I-V measurements are shown to be capable of extracting such device characteristics as trap-free mobility, trap-induced threshold voltage shift (${\Delta}V_t$), as well as effective fast transient trap density. The results demonstrate that the pulsed I-V measurements are an essential technique for evaluating high-$\kappa$ gate dielectric devices.
Keywords
High-$\kappa$; pulse I-V; threshold voltage instability; fast transient charge trapping; mobility; bias temperature instability; hafnium; MOSFET;
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