• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.830-833
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• 2003

This paper describes the fabrication and characteristics of 3C-SiCOI sotctures by SDB and etch-back technology for high-temperature MEMS applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si(001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The wafer bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR. The strength of the bond was measured by tensile strengthmeter. The bonded interface was also analyzed by SEM. The properties of fabricated 3C-SiCOI structures using etch-back technology in TMAH solution were analyzed by XRD and SEM. These results indicate that the 3C-SiCOI structure will offers significant advantages in the high-temperature MEMS applications.

• 제어로봇시스템학회:학술대회논문집
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• 1988.10a
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• pp.353-359
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• 1988

In this paper, the design and implementation of a multi-processor based die bonder machine for the semiconductor will be described. This is a final research results carried out for two years from June, 1986 to July, 1988. The mechanical system consists of three subsystems such as bonding head module, wafer feeding module, and lead frame feeding module. The overall control system consists of the following three subsystems each of which employs a 16 bit microprocessor MC 68000 : (i) supervisory control system, (ii) visual recognition / inspection system and (iii) the display system. Specifically, the supervisory control system supervises the whole sequence of die bonder machine, performs a self-diagnostics while it controls the bonding head module according to the prespecified bonding cycle. The vision system recognizes the die to inspect the die quality and deviation / orientation of a die with respect to a reference position, while it controls the wafer feeding module. Finally, the display system performs a character display, image display ans various error messages to communicate with operator. Lead frame feeding module is controlled by this subsystem. It is reported that the proposed control system were applied to an engineering sample and tested in real-time, and the results are sucessful as an engineering sample phase.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.160-163
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• 2003

This paper describes on anodic bonding characteristics of MLCA(Multi Layer Ceramic Actuator) to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with same properties were deposited on MLCA under optimum RF magneto conditions(Ar 100 %, input power $1\;/cm^2$). After annealing in $450^{\circ}C$ for 1 hr, the anodic bonding of MLCA to Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in - 760 mmHg. Then, the MLCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity is 0.05-008 %FS. Moreover, any damages or separation of MICA/Si bonded interfaces do not occur during actuation test. Therefore, it is expected that anodic bonding technology of MICA/Si wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

• Korean Journal of Materials Research
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• v.12 no.2
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• pp.117-120
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• 2002

We investigated the possibility of direct bonding of the Si ∥SiO$_2$/Si$_3$N$_4$∥Si wafers for Oxide-Nitride-Oxide(ONO) gate oxide applications. 10cm-diameter 2000$\AA$-thick thermal oxide/Si(100) and 500$\AA$-Si$_3$N$_4$LPCVD/Si (100) wafers were prepared, and wet cleaned to activate the surface as hydrophilic and hydrophobic states, respectively. Cleaned wafers were premated wish facing the mirror planes by a specially designed aligner in class-100 clean room immediately. Premated wafer pairs were annealed by an electric furnace at the temperatures of 400, 600, 800, 1000, and 120$0^{\circ}C$ for 2hours, respectively. Direct bonded wafer pairs were characterized the bond area with a infrared(IR) analyzer, and measured the bonding interface energy by a razor blade crack opening method. We confirmed that the bond interface energy became 2,344mJ/$\m^2$ when annealing temperature reached 100$0^{\circ}C$, which were comparable with the interface energy of homeogenous wafer pairs of Si/Si.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.9
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• pp.672-675
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• 1999

Si-to-Si electrostatic bonding was carried out by employing LSG interlayer instead of conventional Corning #7740 interlayer in order to improve bonding properties. The surface roughness and dielectric breakdown field of the LSG interlayers deposited on Si substrates were investigated. Also, the bonding interface, bonding strength and bonding mechanism were discussed for the electrostatically-bonded Si-Si wafer pairs having LSG interlayers.

• Transactions of the KSME C: Technology and Education
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• v.3 no.4
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• pp.265-271
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• 2015

The bonding process should be achieved in vacuum environment to avoid air bubble. In this study, we studied about pressure uniformity that became an issue in thermo compression bonding usually. Uniform press is realized by the method that use air spring and metal form spring. The concept of uniform press using air spring is removed except pressing direction in the press processing so angle between the vector of pressure surface and the pressure axis is parallel automatically. Air spring compensate the errors of machining and assembly. Metal form compensate the thermal deformation and flatness error.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.61-71
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• 1999

The recent trend toward higher frequencies, miniaturization and lower-cost in wireless communication equipment is demanding high density packaging technologies such flip chip interconnection and multichip module(MCM) as a substitute of conventional plastic package. With analyzing the recently reported research results of the RF flip chip, this paper presents the technical issues and advantages of RF flip chip and suggest the flip chip technologies suitable for the development stage. At first, most of RF flip chips are designed in a coplanar waveguide line instead of microstrip in order to achieve better electrical performance and to avoid the interaction with a substrate. Secondly, eliminating wafer back-side grinding, via formation, and back-side metallization enables the manufacturing cost to be reduced. Finally, the electrical performance of flip chip bonding is much better than that of plastic package and the flip chip interconnection is more suitable for Transmit/Receiver modules at higher frequency. However, the characterization of CPW designed RF flip chip must be thoroughly studied and the Au stud bump bonding shall be suggested at the earlier stage of RF flip chip development.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3310-3312
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• 1999

We have studied the method of silicon direct bonding using the mixture of $HNO_$, $H_2O_2$, and HF chemicals called the controlled slight etch (CSE) solution for the effective wafer cleaning. CSE, two combinations of oxidizing and etching agents, have been used to clean the silicon surfaces prior to wafer bonding. Two wafers of silicon and silicon dioxide were contacted each other at room temperature and postannealed at $300{\sim}1100^{\circ}C$ in $N_2$ ambient for 2.5 h. We have cleaned silicon wafers with the various HF concentrations and characterized the parameters with regard to surface roughness, chemical nature, chemical oxide thickness, and bonding energy. It was observed that the chemical oxide thickness on silicon wafer decreased with increasing HF concentrations. The initial interfacial energy and final energy postannealed at $1100^{\circ}C$ for 2.5h measured by the crack propagation method was 122 $mJ/m^2$ and 2.96 $mJ/m^2$, respectively.

• Proceedings of the KSME Conference
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• 2004.11a
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• pp.1196-1200
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• 2004

Micropump is very useful component in micro/nano fluidics and bioMEMS applications. In this study, a bubble-powered micropump was fabricated and tested. The micropump consists of two-parallel micro line heaters, a pair of nozzle-diffuser flow controller and a 1 mm in diameter, 400 ${\mu}m$ in depth pumping chamber. The two-parallel micro line heaters with 20 ${\mu}m-width$ and 200 ${\mu}m-length$ were fabricated to be embedded in the silicon dioxide layer of a wafer which serves as a base plate for the micropump. The pumping chamber, the pair of nozzle-diffuser unit and microchannels including the liquid inlet and outlet port were fabricated by etching through another silicon wafer. A glass wafer (thickness of $525{\pm}15$ ${\mu}m$) having two holes of inlet and outlet ports of liquid serve as upper plate of the pump. Finally the silicon wafer of the base plate, the silicon wafer of pumping chamber and the glass wafer were aligned and bonded (Si-Si bonding and anodic bonding). A sequential photograph of bubble nucleation, growth and collapse was visualized by CCD camera. Clearly liquid flow through the nozzle during the period of bubble growth and slight back flow of liquid at the end of collapsing period can be seen. The mass flow rate was found to be dependent on the duty ratio and the operation frequency. As duty ratio increases, flow rate decreases gradually when the duty ratio exceeds 60%. Also as the operation frequency increases, the flow rate of the micropump decreases slightly.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.3
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• pp.88-93
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• 2023

As the demand for High Bandwidth Memory (HBM) increases and the handling capability of larger wafers expands, ensuring reliable Total Thickness Variation (TTV) measurement for stacked wafers becomes essential. This study presents the design of a measurement module capable of measuring TTV across the entire area of a 300mm wafer, along with estimating potential mechanical measurement errors. The module enables full-area measurement by utilizing a center chuck and lift pin for wafer support. Modal analysis verifies the structural stability of the module, confirming that both the driving and measuring parts were designed with stiffness exceeding 100 Hz. The mechanical measurement error of the designed module was estimated, resulting in a predicted measurement error of 1.34 nm when measuring the thickness of a bonding wafer with a thickness of 1,500 ㎛.