• Title/Summary/Keyword: voltage controlled oscillator(VCO)

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Design and Implementation of a Phase Locked Dielectric Resonator Oscillator for Ka Band LNB with Triple VCOs (3중구조 VCO를 이용한 Ka Band LNB 용 PLDRO 설계 및 제작)

  • Kang, Dong-Jin;Kim, Dong-Ok
    • 한국정보통신설비학회:학술대회논문집
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    • 2008.08a
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    • pp.441-446
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    • 2008
  • In this papers, a PLDRO(Phase Locked Dielectric Resonator Oscillator) is designed and implemented at the oscillator in which fundamental frequency is 18.3 GHz. The proposed PLDRO so as to improve the PLDRO of the general structure is designed to the goal of the minimize of the size and the performance improvement. Three VCO(Voltage controlled Oscillator) and the power combiner improved the output power. A VCDRO(Voltage Controlled Dielectric Resonator Oscillator) is manufactured using a varactor diode to tune oscillating frequency electrically, and its phase is locked to reference frequency by SPD(Sampling Phase Detector). This product is fabricated on Teflon substrate with dielectric constant 2.2 and device is ATF -13786 of Ka-band using. This PLDRO generates an output power of 5.67 dBm at 18.3 GHz and has the characteristics of a phase noise of -80.10 dBc/Hz at 1 kHz offset frequency from carrier, the second harmonic suppression of -33 dBc. The proposed PLDRO can be used in Ka-band satellite applications

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The Tripler Differential MMIC Voltage Controlled Oscillator Using an InGaP/GaAs HBT Process for Ku-band Application

  • Yoo Hee-Yong;Lee Rok-Hee;Shrestha Bhanu;Kennedy Gary P.;Park Chan-Hyeong;Kim Nam-Young
    • Journal of electromagnetic engineering and science
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    • v.6 no.2
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    • pp.92-97
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    • 2006
  • In this paper, a fully integrated Ku-band tripler differential MMIC voltage controlled oscillator(VCO), which consists of a differential VCO core and two triplers, is developed using high linearity InGaP/GaAs HBT technology. The VCO core generates an oscillation frequency of 3.583 GHz, an output power of 3.65 dBm, and a phase noise of -96.7 dBc/Hz at 100 kHz offset with a current consumption of 30 mA at a supply voltage of 2.9 V. The tripler shows excellent side band rejection of 23 dBc at 3 V and 12 mA. The tripler differential MMIC VCO produces an oscillation frequency of 10.75 GHz, an output power of -13 dBm and a phase noise of -89.35 dBc/Hz at 100 kHz offset.

Reliability Characteristics of Voltage-Controlled Oscillator with Channel Width Variation (채널 폭 변화에 따른 전압-제어 발진기의 신뢰성 특성)

  • Choi, Jin-Ho;Lim, In-Taek
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.717-718
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    • 2013
  • The output frequency of VCO(Voltage-Controlled Oscillator) with input frequency is changed if CMOS channel length and width are changed. In this paper, the electrical characteristics of VCO circuit is used as a part of FLL circuit are simulated with CMOS channel width. And the method is introduced to improve the reliability characteristics of VCO with channel width variation.

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A 120 GHz Voltage Controlled Oscillator Integrated with 1/128 Frequency Divider Chain in 65 nm CMOS Technology

  • Kim, Namhyung;Yun, Jongwon;Rieh, Jae-Sung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.1
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    • pp.131-137
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    • 2014
  • A 120 GHz voltage controlled oscillator (VCO) with a divider chain including an injection locked frequency divider (ILFD) and six static frequency dividers is demonstrated using 65-nm CMOS technology. The VCO is designed based on the LC cross-coupled push-push structure and operates around 120 GHz. The 60 GHz ILFD at the first stage of the frequency divider chain is based on a similar topology as the core of the VCO to ensure the frequency alignment between the two circuit blocks. The static divider chain is composed of D-flip flops, providing a 64 division ratio. The entire circuit consumes a DC power of 68.5 mW with the chip size of $1385{\times}835{\mu}m^2$.

Design of Voltage Controlled Oscillator Using the BiCMOS (BiCMOS를 사용한 전압 제어 발진기의 설계)

  • Lee, Yong-Hui;Ryu, Gi-Han;Yi, Cheon-Hee
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.11
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    • pp.83-91
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    • 1990
  • VOC(coltage controlled oscillator) circuits are necessary in applications such at the demodul-ation of FM signals, frequency synthesizer, and for clock recovery from digital data. In this paper, we designed the VCO circuit based on a OTA(operational transconductance amplifier) and the OP amp which using a differential amplifier by BiCMOS circuit. It consists of a OTA, voltage contorolled integrator and a schmitt trigger. Conventional VCO circuits are designed using the CMOS circuit, but in this paper we designed newly BiCMOS VCO circuit which has a good drive avlity, As a result of SPICE simulation, output frequency is 141KHz at 105KHz, and sensitivity is 15KHz.

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Low Phase Noise Series-coupled VCO using Current-reuse and Armstrong Topologies

  • Ryu, Hyuk;Ha, Keum-Won;Sung, Eun-Taek;Baek, Donghyun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.42-47
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    • 2017
  • This paper proposes a new series-coupled voltage-controlled oscillator (VCO). The proposed VCO consists of four current-reuse Armstrong VCOs (CRA-VCOs) coupled by four transformers. The series-coupling, current-reuse, and Armstrong topologies improve the phase noise performance by increasing the negative-Gm of the VCO core with half the current consumption of a conventional differential VCO. The proposed VCO consumes 6.54 mW at 9.78 GHz from a 1-V supply voltage. The measured phase noise is -115.1 dBc/Hz at an offset frequency of 1 MHz, and the FoM is -186.5 dBc/Hz. The frequency tuning range is from 9.38-10.52 GHz. The core area is $0.49mm^2$ in a $0.13-{\mu}m$ CMOS process.

A study on the fabrication of Miniatured VCO using LTCC(Low Temperature Cofired Ceramic) (저온 소성 유전체 재료를 이용한 초소형 VCO (Voltage Controlled Oscillator) 제작에 관한 연구)

  • 유찬세;이영신;이우성;강남기;박종철
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.135-138
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    • 2002
  • VCO(Voltage Controlled Oscillator) is one of the main components governing the size, performance and power consumption of telecommunication devices. As the devices become much smaller, VCO need to have much smaller size with better characteristics. Buried type passive components of L,C,R were developed previously and the structure of these components are good for minimizing the size of VCO. Our own library of passive components is used in simulation and fabrication of VCO circuit, and surface mounted components like varactor diode are analysed using the measurement circuit designed by ourselves. Two-Dimensional simulation of VCO circuit and local three-Dimensional structure simulation are performed and their relation is obtained. In structure of multi-layered VCO, some components governing the characteristics of VCO are selected and placed on the top of oscillator for the good tuning process. In resonator part, the stripline structure and low loss glass/ceramic material are used to get higher Q value. In our research, a VCO oscillates in the 2.3∼2.36 GHz band is developed.

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Design of Voltage Controlled Oscillator for X-band Radar Using CSRR loaded microstrip line (마이크로스트립 종단형 CSRR구조를 이용한 X-band 레이다용 전압제어발진기의 설계)

  • Kim, Gue-Chol
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.9
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    • pp.1277-1283
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    • 2013
  • In this paper, a novel voltage controlled oscillator(VCO) using CSRR loaded microstrip line for X-band RADAR is proposed. Using the microstrip line loaded CSRR inserted between the oscillator and buffer to the filter, the harmonic suppression has been improved. The measured results of the fabricated oscillator shows that its oscillation frequencies are from 9.28 to 9.39GHz according to the tuning voltage 0~10V, its output power level are about 16.6dBm at 9.35GHz. Compared with VCO using the conventional VCO, VCO using CSRR loaded microstirp, the harmonic suppression characteristic has been improved in 10.4dB

A Low-Spur CMOS PLL Using Differential Compensation Scheme

  • Yun, Seok-Ju;Kim, Kwi-Dong;Kwon, Jong-Kee
    • ETRI Journal
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    • v.34 no.4
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    • pp.518-526
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    • 2012
  • This paper proposes LC voltage-controlled oscillator (VCO) phase-locked loop (PLL) and ring-VCO PLL topologies with low-phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer-resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out-band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65-nm or 45-nm process. The measured results of the LC-VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of -118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring-VCO PLL shows a phase noise of -95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.

A 2.4GHz Back-gate Tuned VCO with Digital/Analog Tuning Inputs (디지털/아날로그 입력을 통한 백게이트 튜닝 2.4 GHz VCO 설계)

  • Oh, Beom-Seok;Lee, Dae-Hee;Jung, Wung
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.234-238
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    • 2003
  • In this work, we have designed a fully integrated 2.4GHz LC-tuned voltage-controlled oscillator (VCO) with multiple tuning inputs for a $0.25-{\mu}m$ standard CMOS Process. The design of voltage-controlled oscillator is based on an LC-resonator with a spiral inductor of octagonal type and pMOS-varactors. Only two metal layer have been used in the designed inductor. The frequency tuning is achieved by using parallel pMOS transistors as varactors and back-gate tuned pMOS transistors in an active region. Coarse tuning is achieved by using 3-bit pMOS-varactors and fine tuning is performed by using back-gate tuned pMOS transistors in the active region. When 3-bit digital and analog inputs are applied to the designed circuits, voltage-controlled oscillator shows the tuning feature of frequency range between 2.3 GHz and 2.64 GHz. At the power supply voltage of 2.5 V, phase noise is -128dBc/Hz at 3MHz offset from the carrier, Total power dissipation is 7.5 mW.

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