• 센서학회지
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• 제22권2호
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• pp.130-135
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• 2013

This study proposed a noble process to fabricate TSV (Through Silicon Via) structure which has lower cost, shorter production time, and more simple fabrication process than plating method. In order to produce the via holes, the Si wafer was etched by a DRIE (Deep Reactive Ion Etching) process. The via hole was $100{\mu}m$ in diameter and $400{\mu}m$ in depth. A dielectric layer of $SiO_2$ was formed by thermal oxidation on the front side wafer and via hole side wall. An adhesion layer of Ti and a seed layer of Au were deposited. Soldering process was applied to fill the via holes with solder paste and metal powder. When the solder paste was used as via hole metal line, sintering state and electrical properties were excellent. However, electrical connection was poor due to occurrence of many voids. In the case of metal powder, voids were reduced but sintering state and electrical properties were bad. We tried the via hole filling process by using mixing solder paste and metal powder. As a consequence, it was confirmed that mixing rate of solder paste (4) : metal powder (3) was excellent electrical characteristics.

• 한국재료학회지
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• 제22권7호
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• pp.335-341
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• 2012

Recently, the demand for the miniaturization of printed circuit boards has been increasing, as electronic devices have been sharply downsized. Conventional multi-layered PCBs are limited in terms their use with higher packaging densities. Therefore, a build-up process has been adopted as a new multi-layered PCB manufacturing process. In this process, via-holes are used to connect each conductive layer. After the connection of the interlayers created by electro copper plating, the via-holes are filled with a conductive paste. In this study, a desmear treatment, electroless plating and electroplating were carried out to investigate the optimum processing conditions for Cu via filling on a PCB. The desmear treatment involved swelling, etching, reduction, and an acid dip. A seed layer was formed on the via surface by electroless Cu plating. For Cu via filling, the electroplating of Cu from an acid sulfate bath containing typical additives such as PEG(polyethylene glycol), chloride ions, bis-(3-sodiumsulfopropyl disulfide) (SPS), and Janus Green B(JGB) was carried out. The desmear treatment clearly removes laser drilling residue and improves the surface roughness, which is necessary to ensure good adhesion of the Cu. A homogeneous and thick Cu seed layer was deposited on the samples after the desmear treatment. The 2,2'-Dipyridyl additive significantly improves the seed layer quality. SPS, PEG, and JGB additives are necessary to ensure defect-free bottom-up super filling.

• 한국소음진동공학회논문집
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• 제27권1호
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• pp.65-71
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• 2017

This work presents a comparative work on the ride comfort of a quarter car suspension system between two different magneto-rheological (MR) dampers; one is conventional type without bypass hole and the other is featured by several bypass holes in the piston. As a first step, two different MR dampers are designed on the basis of the governing equation and manufactured with same geometric dimensions except the bypass holes. After investigating the field-dependent damping properties, two dampers are installed to the quarter car suspension system. The suspension model is then derived and a sky-hook controller is implemented to identify vibration control performance under random road. It is shown that the suspension system with MR damper featured by the bypass holes can provide much better ride quality than the case without the bypass holes. This is validated via experimental implementation.

• 천문학회보
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• 제37권1호
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• pp.92.2-92.2
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• 2012

Previous simulations posed a problem that they used reduced ion to electron mass ratios to save computation time. It was assumed that ion and electron dynamics are sufficiently separated, but it was not clearly verified. In this study, we examine the effect of ion to electron mass ratios on the generation of ion holes by ion beam driven instability. Ion holes are generated via electron holes in an applied electric field with the given initial condition. First, the ion acoustic instability is excited and nonlinearly develops. After the ion acoustic instability nonlinearly develops, the ion two-stream instability is excited and develops into ion holes. This implies that the previously suggested ion beam driven instability is strongly affected by the coupling between ions and electrons and the ion to electron mass ratio is important on the development of the instability. The energy transition and detail variation is different as reduced mass ratio under the same observation value based on FAST satellite. Although, the parameters are rescaled by conserving the kinetic energy to obtain the proper results, the nonlinear evolution is not perfectly identical.

• 한국전기전자재료학회논문지
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• 제16권12S호
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• pp.1237-1241
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• 2003

In this paper, we report a novel RF-MEMS packaging technology with lightweight, small size, and short electric path length. To achieve this goal, we used the ultra thin silicon substrate as a packaging substrate. The via holes lot vortical feed-through were fabricated on the thin silicon wafer by wet chemical processing. Then, via holes were filled and micro-bumps were fabricated by electroplating. The packaged RF device has a reflection loss under 22 〔㏈〕 and a insertion loss of -0.04∼-0.08 〔㏈〕. These measurements show that we could package the RF device without loss and interference by using the vertical feed-through. Specially, with the ultra thin silicon wafer we can realize of a device package that has low-cost, lightweight and small size. Also, we can extend a 3-D packaging structure by stacking assembled thin packages.

• 마이크로전자및패키징학회지
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• 제11권4호
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• pp.1-5
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• 2004

다층 연성기판은 높은 전기 전도성과 낮은 절연상수로 잘 알려진 구리와 폴리이미드로 구성되어 있다. 본 연구에서는 이러한 다층연성기판을 패턴된 스테인리스 스틸 위에 구리선을 전기도금하고 폴리이미드를 코팅함에 의해서 균일한 형태의 $5{\mu}m$-pitch의 전도선을 제조하는데 성공하였다. 또한, 다층기판 형성시 비아흘은 UV 레이저로 형성시켰으며 구리와 주석을 전기 도금함으로 이를 채웠다. 그런다음 비아와 전도선이 붙은 채로 스테인리스 스틸에서 벗겨냈다. 이렇게 형성된 각각의 층을 한번에 적층하여 다층연성기판을 완성하였다. 적층시 주석과 구리사이에 고체상태 반응(Solid state reaction)이 발생하여 $Cu_6Sn_5$ and $Cu_3Sn$을 형성하였으며 비아패드에 비아가 수직으로 위치한 완전한 형태의 층간 연결을 형성하였다. 이러한 비아 형성 공정은 V형태의 비아나 페이스트 비아와 비교할 때 좋은 전기적 특성, 저가공정등의 여러 장점을 가지고 있다.

• 인지과학
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• 제27권3호
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• pp.355-376
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• 2016

이차원 표면에 난 구멍은 이를 둘러싼 물체에 의해 경계 지워진 빈 배경임에도 불구하고, 구멍의 모양은 다른 물체만큼 쉽게 지각된다. 즉, 구멍은 전경-배경 조직화의 깊이-형태 간 연결 관계(depth-shape coupling)를 예외적으로 위반하여, 깊이 상으로는 배경임에도 불구하고 형태를 갖는 준-전경적(quasi-figural) 사례처럼 보인다. 구멍의 준-전경적 속성을 지지하는 연구들은 구멍과 물체의 재인율이 유사하다는 기억 과제 결과에 주로 의존하고 있으므로, 구멍 모양의 기억이 지각적 처리에 기반하고 있는지는 불분명하다. 본 연구는 재인 과제보다 즉각적인 지각 처리를 반영하는 변화탐지 과제를 이용하여, 구멍을 경계 짓는 물체의 안쪽 윤곽선이 시각 작업기억에 어떻게 표상되는지 알아보았다. 이를 위해, 물체 내부에 다른 물체가 중첩된 접합 물체 조건과 구멍이 있는 물체 조건에서 안쪽 윤곽선과 바깥 영역의 색에 대한 변화탐지 수행을 비교하였다. 시각 작업기억의 선행 연구들은 형태나 방향과 같은 물체의 윤곽선 속성(boundary feature)이 표면 속성(surface feature)과 함께 통합되어 하나의 물체로 저장됨을 시사한다. 만일 구멍의 경계선이 구멍을 둘러싼 물체에 지각적으로 할당된다면, 이 경계선과 물체의 표면색이 통합적으로 부호화되는 물체 중심적 처리 이득으로 인해, 구멍 자극 조건에서 접합 자극 조건보다 높은 변화 탐지 수행이 예측되었다. 두 실험의 결과, 구멍 자극 조건의 변화 탐지 수행은 접합 자극 조건과 다르지 않았다. 이는 물체 내부의 윤곽선(구멍의 경계선) 속성이 물체의 표면 속성과 통합적으로 부호화되지 않으며, 구멍을 둘러싼 물체와 독립적으로 처리됨을 시사한다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2007년도 춘계학술대회
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• pp.391-394
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• 2007

The foundation insert is a tubular steel section which is embedded into the concrete of the foundation. The tower base section of the wind turbine is mounted on it. It has a top flange (L type) protruding far enough above the concrete to allow bolts to be inserted from underneath. The load is transmitted to the concrete at the base of the section through a T shaped flange. It has many holes for the reinforcements and the cables. The reinforcements of the concrete foundation run through the insert via a series of holes to bind the inner section to the outer section. Holes are provided for the power and communications cabling. The design follows normal European wind turbine practice, based on GL 2003 and Eurocode regulations.

• 소성∙가공
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• 제13권1호
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• pp.65-71
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• 2004

Recent electronic equipment becomes smaller, more functional, and more complex. According to these trends, LTCC(low temperature co-fired ceramic) has been emerged as a promising technology in packaging industry. It consists of multi-layer ceramic sheet, and the circuit has 3D structure. In this technology via hole formation plays an important role because it provides an electric path for the packaging interconnection network. Therefore via hole qualify is very important for ensuring performance of LTCC product. Via holes are formed on the green sheet that consists of ceramic(before sintering) layer and PET(polyethylene terephthalate) one. In this paper we found the correlation between hole quality and process condition such as PET thickness and ceramic thickness. The shear behavior of double layer sheet by micro hole punching which is different from that of single layer one was also discussed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.557-558
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• 2008

This paper presents the effects of via losses to be connected with an embedded DPDT(Double Pole Double Thru) in a substrate. The substrate consists of two ABF(Ajinomoto Bonding Film) and a Epoxy core. In order to verify and test effects of via, via chains in a substrate using SoP-L process are proposed and measured. Via loss can be calculated as averaging the total via holes. The exact loss of a DPDT switch embedded in substrate are extracted by using the results of via chain and measured data from embedded DPDT. The calculated one via insertion loss is about 0.0005 dB on basis of measured via chains. This result confirms very low loss in via. So the inserti on loss of the embedded switch is confirmed only switch loss as loss is 0.4 dB.