A Circuit design for generating binary logarithms for possible signal processing using programmable variable - rate up/down counter (Programmable variable-rate up/down counter를 사용한 신호처리가 가능한 Binary logarithms 발생을 위한 회로설계)
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- The Journal of the Acoustical Society of Korea
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- v.5 no.3
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- pp.13-20
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- 1986