• Title/Summary/Keyword: up/down counter

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A Circuit design for generating binary logarithms for possible signal processing using programmable variable - rate up/down counter (Programmable variable-rate up/down counter를 사용한 신호처리가 가능한 Binary logarithms 발생을 위한 회로설계)

  • 이지영
    • The Journal of the Acoustical Society of Korea
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    • v.5 no.3
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    • pp.13-20
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    • 1986
  • 본 논문은 신호처리가 가능한 2진 로가리즘 상수를 발생시키기 위한 programmable variable-rate up/down 계수기의 설계를 기술한다. 2진수에 대한 밑수가 2인 로가리즘 계승의 적용은 결 과적으로 오차가 발생한다. log\sub 2\(1+χ)-χ에 의해 정의된 것처럼 log\sub 2\(1+χ)에서의 오차는 직선의 집합으로 갖게된다. 계수기 rate는 직선의 기울기에 비례한다. 그러므로 신호처리가 가능한 2진 로가리즘 상수는 programmable 계수기를 사용함으로써 쉽게 발생될 수 있다.

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3-bit Up/Down Counter based on Magnetic-Tunnel-Junction Elements (Magnetic-Tunnel-Junction 소자를 이용한 3비트 업/다운 카운터)

  • Lee, Seung-Yeon;Kim, Ji-Hyun;Lee, Gam-Young;Yang, Hee-Jung;Lee, Seung-Jun;Shin, Hyung-Soon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.1-7
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    • 2007
  • An MTJ element not only computes Boolean function but also stores the output result in itself. We can make the most use of magneto-logic's merits by employing the magneto-logic in substitution for the sequential logic as well as the combinational logic. This unique feature opens a new horizon for potential application of MTJ as a universal logic element. Magneto-logic circuits using MTJ elements are more integrative and non-volatile. This paper presents novel 3-bit magneto-logic up/down counters and presents simulation results based on the HSPICE macro-model of MTJ that we have developed.

Design of Synchronous Quaternary Counter using Quaternary Logic Gate Based on Neuron-MOS (뉴런 모스 기반의 4치 논리게이트를 이용한 동기식 4치 카운터 설계)

  • Choi Young-Hee;Yoon Byoung-Hee;Kim Heung-Soo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.3 s.333
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    • pp.43-50
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    • 2005
  • In this paper, quaternary logic gates using Down literal circuit(DLC) has been designed, and then synchronous Quaternary un/down counter using those gates has been proposed The proposed counter consists of T-type quaternary flip flop and 1-of-2 threshold-t MUX, and T-type quaternary flip flop consists of D-type quaternary flip flop and quaternary logic gates(modulo-4 addition gates, Quaternary inverter, identity cell, 1-of-4 MUX). The simulation result of this counter show delay time of 10[ns] and power consumption of 8.48[mW]. Also, assigning the designed counter to MVL(Multiple-valued Logic) circuit, it has advantages of the reduced interconnection and chip area as well as easy expansion of digit.

The Development of Exclusive Control Valve for Improving the Performance of Truck Cab Tilting System (트럭 캡 틸팅 시스템의 성능 향상을 위한 전용 제어 밸브의 개발)

  • Park, Sung-Hwan;Lee, Jin-Kul
    • Journal of the Korean Society for Precision Engineering
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    • v.18 no.3
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    • pp.90-98
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    • 2001
  • In this paper, the development of exclusive control valve for improving the performance of truck cab tilting system is discussed. Cab tilting system is implemented to the heavy truck for the convenience of driver. However when tilting up or down, sudden swing of cab has brought discredit on user. To improve this phenomena it is inevitable to use counter balance valve. But because of high pressure and low flow characteristic, general counter balance valve is unsuitable to cab tilting system. Therefore, this paper presents the developments of exclusive return pressure control valve which prevents sudden swing of cab and verify the validity of design through the computer simulation.

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High accuracy, Low Power Spread Spectrum Clock Generator to Reduce EMI for Automotive Applications

  • Lee, Dongsoo;Choi, Jinwook;Oh, Seongjin;Kim, SangYun;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.6
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    • pp.404-409
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    • 2014
  • This paper presents a Spread Spectrum Clock Generator (SSCG) based on Relaxation oscillator using Up/Down Counter. The current is controlled by a counter and the spread spectrum of the Relaxation Oscillator. A Relaxation Oscillator with temperature compensation using the BGR and ADC is presented. The current to determine the frequency of the Relaxation Oscillator can be controlled. The output frequency of the temperature can be compensated by adjusting the current according to the temperature using the code that is the output from the ADC and BGR. EMI Reduction of SSCG is 11 dB, and Spread down frequency is 150 kHz. The current consumption is $600{\mu}A$ from 5V and the operating frequency is from 2.3 MHz to 5.75 MHz. The rate of change of the output frequency with temperature was approximately ${\pm}1%$. The SSCG is fabricated in a 0.35um CMOS process with active area $250um{\times}440um$.

An Embedded Timing Loss Detector for Robust Data Transmission (데이터 전송을 위한 타이밍 손실 검출기)

  • 이용환
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.9
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    • pp.1404-1411
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    • 1993
  • Unlike voice communication, data transmission, can be seriously affected by transient channel impairments. In some cases, timing synchronization between the transmitter and the receiver may not be recovered in the presence of these kinds of impairments without a forced reinitialization process. Therefore, it is highly desirable for data communication equipment to have an efficient timing loss detector for robust recovery. In this paper, one such detector is proposed for data transceivers haying a secondary channel embedded in the main channel. A known sequence multiplexed with the secondary channel data is repeatedly sent through the embedded secondary channel. For continuous watch-dog like operation, the detection is sequentially performed based on a modified up/down counter scheme. The performance of the proposed detector is analytically evaluated In closed form.

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The Living Theatre: A History Study of Its Birth and Death (리빙 씨어터: 탄생과 소멸에 관한 사적(史的) 연구)

  • Kim, Jung-hyo
    • Journal of Korean Theatre Studies Association
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    • no.40
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    • pp.207-237
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    • 2010
  • Concentrating on the birth, life, and death of the Living Theatre, almost half a century avant-garde group, the primary purpose of this study at large is to explore its counter-cultural philosophy. While taking a chronological form adapting the biological order, the paper focuses on the troupe's productions: , , , , and . Through out these productions the philosophy of the Living Theatre seemed to included communal, anti-intellectual, politically radical, generally Utopian, and proselytizers for sexual freedom. The history of the Living Theatre interestingly parallels the history of the Beck's theatre in occupation and shut down. The first New York theatre was closed by fire inspectors for instance. The second theatre was declared unsafe, and locked up by the Building Department. The third theatre was seized by the IRS, consequently shut down. In 1984, after more than 25years from the third building, the Living Theatre settled once again on East Third Street in Manhattan. The theatre was however evacuated by the New York City Fire Department in 1993 and once more took to the road. With these struggles, the Becks' profound aspiration of the counter-cultural insurgency came to harden as strong as 'iron' in some ways. With the outstanding components of counter-cultural philosophy and style, the Living Theatre, in the course of the transformation, absorbed and then reflected virtually every phase for the Living Theatre were vehicles for more than just aesthetics. The group seemed to propagandize its beliefs rather performing productions. Accordingly, both on and off-stage action of the Living Theatre caused great controversy either through political activism of individual members or through the unconventional collective life style. No avant-garde theatre company was more emblematic of the rebellious spirit of the sixties than the Living Theatre. Like the first great transformation, the Becks' encounter, their personal values and the form of theatre they created had blended 'so inextricably that the vitality of each was dependent on the other.' The Becks always urged unity and harmony at all levels of human life, but not at any price. The anticapitalist ideal inspired the Becks to promote a politically motivated campaign throughout their productions. They believed the revolution is desirable but in the state of non-violence and the expansion of human consciousness. Julian Beck's gravestone identifies his as pet, painter, actor, and anarchist. The Living Theatre was a 'small umbrella' under which the Becks and its members could breath and unfold their dream on stage or in the street.

A Mixed-Signal IC for Magnetic Stripe Storage System (자기 띠 저장 시스템을 위한 혼성 신호 칩)

  • Lim, Shin-Il;Choi, Jong-Chan
    • Journal of IKEEE
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    • v.2 no.1 s.2
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    • pp.34-41
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    • 1998
  • An integrated circuit for magnetic stripe storage system is implemented. All the analog and digital circuits are integrated in one chip. The analog block contains preamplifier, peak detecter, comparator and reference generater. And digital block includes reference window signal generater, up/down counter for F/2F signal measurement, bit-error detection logic, and control logic. Both the encoding and decoding functions for F/2F signal processing are provided. An AGC(automatic gain control) circuit which was included in conventional circuits is eliminated due to optimized circuit design. Misreading prevention circuits are also proposed by fixing up new reference bit when broken bits are detected. The prototype chip is implemented using $0.8{\mu}m$ N-well CMOS technology and operates from 3.3 V to 7.5 V of supply voltage. It occupies a die area of $3.04mm^2(1.6mm{\times}1.9mm)$ and dissipates 8 mW with a 5 V supply voltage.

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Modified Digital Pulse Width Modulator for Power Converters with a Reduced Modulation Delay

  • Qahouq, Jaber Abu;Arikatla, Varaprasad;Arunachalam, Thanukamalam
    • Journal of Power Electronics
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    • v.12 no.1
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    • pp.98-103
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    • 2012
  • This paper presents a digital pulse width modulator (DPWM) with a reduced digital modulation delay (a transport delay of the modulator) during the transient response of power converters. During the transient response operation of a power converter, as a result of dynamic variations such as load step-up or step-down, the closed loop controller will continuously adjust the duty cycle in order to regulate the output voltage. The larger the modulation delays, the larger the undesired output voltage deviation from the reference point. The three conventional DPWM techniques exhibit significant leading-edge and/or trailing-edge modulation delays. The DPWM technique proposed in this paper, which results in modulation delay reductions, is discussed, experimentally tested and compared with conventional modulation techniques.

FPGA Based PWM Generator for Three-phase Multilevel Inverter

  • Tran, Q.V.;Chun, T.W.;Kim, H.G.;Nho, E.C.
    • Proceedings of the KIPE Conference
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    • 2008.06a
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    • pp.225-227
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    • 2008
  • This paper deals with the implementation on a Field Programmable Gate Array (FPGA) of PWM switching patterns for a voltage multilevel inverter. The reference data in main microcontroller is transmitted to the FPGA through 16 general purpose I/O ports. Herein, three-phase reference voltage signals are addressed by the last 2-bit (bit 15-14) and their data are assigned in remaining 14-bit, respectively. The carrier signals are created by 16-bit counter in up-down counting mode inside FPGA according to desirable topology. Each reference signal is compared with all carrier signals to generate corresponding PWM switching patterns for control of the multilevel inverter. Useful advantages of this scheme are easy implementation, simple software control and flexibility in adaptation to produce many PWM signals. Some simulations and experiments are carried out to validate the proposed method.

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