• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.43-52
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• 2005

An prescaler which uses PLL(Phase Locked Loop) must satisfy high speed operation and low power consumption. Thus the performance or TSPC(True Single Phase Clocked) D-flip flops which is applied at Prescaler is very important. Power consumption of conventional TSPC D-flip flops was increased with glitches from output and unnecessary discharge at internal node in precharge phase. We proposed a new D-flip flop which reduced two clock transistors for precharge and discharge Phase. With inserting a new PMOS transistor to the input stage, we could prevent from unnecessary discharge in precharge phase. Moreover, to remove the glitch problems at output, we inserted an PMOS transistor in output stage. The proposed flip flop showed stable operations as well as low power consumption. The maximum frequency of prescaler by applying the proposed D-flip flop was 2.92GHz and achieved power consumption of 10.61mw at 3.3V. In comparison with prescaler applying the conventional TSPC D-flip $flop^[6]$, we obtained the performance improvement of $45.4\%$ in the view of PDP(Power-Belay-Product).

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.8
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• pp.3976-3982
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• 2013

This paper presents a temperature analysis of the chaotic behavior in the voltage controlled CMOS chaotic circuit. The circuit is based on a simple nonlinear function block which is needed for chaotic signal generation. It consists of a NFB (nonlinear function block), a level shifter and non-overlapping two-phase clock for sample and hold. By SPICE simulation, chaotic dynamics such as frequency spectra and bifurcations according to the temperature variations were analyzed. And, it was showed that the circuit can generate discrete chaotic signals within control voltage in the range from 1.2 V to 2.3 V in a specific temperature condition of $25^{\circ}C$.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.607-608
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• 2006

A CMOS phase-locked loop (PLL) which synthesizes frequencies between $6.336{\sim}8.976GHz$ in steps of 528MHz and settles in approximately 150ns using the 528MHz reference clock is presented. Frequency hopping between the bands in the each mode is critical point to design the PLL in multi-band orthogonal frequency division multiplexing (OFDM) because frequency switching between each band is less than 9.5ns. To achieve the fast loop settling, integer-N PLL that operates with the high reference frequency to meet the settling requirement is implemented. Two PLLs that operate at 9GHz and 528MHz is integrated and shows the band hopping lower than 1ns.

• Journal of Positioning, Navigation, and Timing
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• v.10 no.2
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• pp.75-82
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• 2021

Fields of high-precision positioning applications are growing fast across the mass market worldwide. Accordingly, the industry is focusing on developing methods of applying State-Space Representation (SSR) corrections on low-cost GNSS receivers. Among SSR correction types, this paper analyzes Safe Position Augmentation for Real Time Navigation (SPARTN) messages being offered by the SAfe and Precise CORrection DAta (SAPCORDA) company and validates positioning algorithms based on them. The first part of this paper introduces the SPARTN format in detail. Then, procedures on how to apply Basic-Precision Atmosphere Correction (BPAC) and High-Precision Atmosphere Correction (HPAC) messages are described. BPAC and HPAC messages are used for correcting satellite clock errors, satellite orbit errors, satellite signal biases and also ionospheric and tropospheric delays. Accuracies of positioning algorithms utilizing SPARTN messages were validated with two types of positioning strategies: Code-PPP using GPS pseudorange measurements and PPP-RTK including carrier phase measurements. In these performance checkups, only single-frequency measurements have been used and integer ambiguities were estimated as float numbers instead of fixed integers. The result shows that, with BPAC and HPAC corrections, the horizontal accuracy is 46% and 63% higher, respectively, compared to that obtained without application of SPARTN corrections. Also, the average horizontal and vertical RMSE values with HPAC are 17 cm and 27 cm, respectively.

• Journal of Positioning, Navigation, and Timing
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• v.6 no.3
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• pp.125-133
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• 2017

Time comparison is necessary for the verification and synchronization of the clock. Two-way satellite time and frequency (TWSTFT) is a method for time comparison over long distances. This method includes errors such as atmospheric effects, satellite motion, and environmental conditions. Ionospheric delay is one of the significant time comparison error in case of the carrier-phase TWSTFT (TWCP). Global Ionosphere Map (GIM) from Center for Orbit Determination in Europe (CODE) is used to compare with Bernese. Thin shell model of the ionosphere is used for the calculation of the Ionosphere Pierce Point (IPP) between stations and a GEO satellite. Korea Research Institute of Standards and Science (KRISS) and Koganei (KGNI) stations are used, and the analysis is conducted at 29 January 2017. Vertical Total Electron Content (VTEC) which is generated by Bernese at the latitude and longitude of the receiver by processing a Receiver Independent Exchange (RINEX) observation file that is generated from the receiver has demonstrated adequacy by showing similar variation trends with the CODE GIM. Bernese also has showed the capability to produce high resolution IONosphere map EXchange (IONEX) data compared to the CODE GIM. At each station IPP, VTEC difference in two stations showed absolute maximum 3.3 and 2.3 Total Electron Content Unit (TECU) in Bernese and GIM, respectively. The ionospheric delay of the TWCP has showed maximum 5.69 and 2.54 ps from Bernese and CODE GIM, respectively. Bernese could correct up to 6.29 ps in ionospheric delay rather than using CODE GIM. The peak-to-peak value of the ionospheric delay for TWCP in Bernese is about 10 ps, and this has to be eliminated to get high precision TWCP results. The $10^{-16}$ level uncertainty of atomic clock corresponds to 10 ps for 1 day averaging time, so time synchronization performance needs less than 10 ps. Current time synchronization of a satellite and ground station is about 2 ns level, but the smaller required performance, like less than 1 ns, the better. In this perspective, since the ionospheric delay could exceed over 100 ps in a long baseline different from this short baseline case, the elimination of the ionospheric delay is thought to be important for more high precision time synchronization of a satellite and ground station. This paper showed detailed method how to eliminate ionospheric delay for TWCP, and a specific case is applied by using this technique. Anyone could apply this method to establish high precision TWCP capability, and it is possible to use other software such as GIPSYOASIS and GPSTk. This TWCP could be applied in the high precision atomic clocks and used in the ground stations of the future domestic satellite navigation system.

• Publications of The Korean Astronomical Society
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• v.36 no.3
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• pp.79-95
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• 2021

This study aims to develop a restoration model of an armillary sphere of Tongcheon-ui (Pan-celestial Armillary Sphere) by referring to the records of Damheonseo (Hong Dae-Yong Anthology) and the artifact of an armillary sphere in the Korean Christian Museum of Soongsil University. Between 1760 and 1762, Hong, Dae-Yong (1731-1783) built Tongcheon-ui, with Na, Kyung-Jeok (1690-1762) designing the basic structure and Ann, Cheo-In (1710-1787) completing the assembly. The model in this study is a spherical body with a diameter of 510 mm. Tongcheon-ui operates the armillary sphere by transmitting the rotational power from the lantern clock. The armillary sphere is constructed in the fashion of a two-layer sphere: the outer one is Yukhab-ui that is fixed; and the inner one, Samsin-ui, is rotated around the polar axis. In the equatorial ring possessed by Samsin-ui, an ecliptic ring and a lunar-path ring are successively fixed and are tilted by 23.5° and 28.5° over the equatorial ring, respectively. A solar miniature attached to a 365-toothed inner gear on the ecliptic ring reproduces the annual motion of the Sun. A lunar miniature installed on a 114-toothed inner gear of the lunar-path ring can also replay the moon's orbital motion and phase change. By the set of 'a ratchet gear, a shaft and a spur gear' installed in the solstice-colure double-ring, the inner gears in the ecliptic ring and lunar-path ring can be rotated in the opposite direction to the rotation of Samsin-ui and then the solar and lunar miniatures can simulate their revolution over the period of a year and a month, respectively. In order to indicate the change of the moon phases, 27 pins were arranged in a uniform circle around the lunar-path ring, and the 29-toothed wheel is fixed under the solar miniature. At the center of the armillary sphere, an earth plate representing a world map is fixed horizontally. Tongcheon-ui is the armillary sphere clock developed by Confucian scholars in the late Joseon Dynasty, and the technical level at which astronomical clocks could be produced at the time is of a high standard.

• Korean Journal of Applied Biomechanics
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• v.17 no.2
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• pp.31-40
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• 2007

Proper weight shifting is essential for a successful shot in golf swing and this could be described by means of the ground forces between the feet and ground. It is assumed that the ground forces would different according to the club used because the length and swing weight of each club is different. But, in present, it is not clear what changes are made by the change of clubs and this affect the swing motion. Therefore this study focused on the investigation of the changes of the ground forces and ground reaction forces (GRF) by the change of club length. The subjects were three professional male golfers. Four swings (driver, iron 3, iron 5, and iron 7) for each subject were taken by two high speed video cameras and two AMTI force platforms were used to measure the GRF simultaneously. Kwon GRF 2.0 and Mathcad 13 software were used to post processing the data. Changes of the three major component of GRF (Vertical, lateral, anterior-posterior force) at 10 predefined events were analyzed including the maximum. Major findings of this study were as follows. 1. Vertical forces; - There were no significant changes until the top of backswing. - Maximum was occurred at the club horizontal position in the downswing for both feet. The shorter club produced more maximum forces than longer ones in the left foot, but reverse were true for the right foot. - Maximum forces at impact shows the same patterns. 2. Lateral forces; Maximum was occurred at the club horizontal position for both feet, but there were no lateral forces because the direction of two forces was different. Maximum force pattern by different clubs was same as the vertical component. 3. Anterior-posterior forces; - This component made a counter-clock wise moment about a vertical axis located between two foot until the club vertical position was reached during the backswing, and reverse moment were produced when the club reached horizontal at the downswing. - Also this component made a forward moment about a horizontal axis located in the CG during the fore half of the downswing, and a reverse moment until the club reached vertical at the follow through phase. Maximum was occurred at the club vertical in the downswing for both feet. The longer club produced more maximum forces than shorter ones for both feet.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• v.1
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• pp.235-240
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• 2006

The paper will give an overview of the mission of GalTeC and then concentrate on two main aspects. The first more detailed aspect, is the analysis of the key performance parameters for the Galileo system services and presenting a technical overview of methods and algorithms used. The second more detailed aspect, is the service volume prediction including service dimensioning using the Prediction tool. In order to monitor and validate the Galileo SIS performance for Open Service (OS) and Safety Of Life services (SOL) regarding the key performance parameters, different analyses in the SIS domain and User domain are considered. In the SIS domain, the validation of Signal-in-Space Accuracy SISA and Signal-in-Space Monitoring Accuracy SISMA is performed. For this purpose first of all an independent OD&TS and Integrity determination and processing software is developed to generate the key reference performance parameters named as SISRE (Signal In Space Reference Errors) and related over-bounding statistical information SISRA (Signal In Space Reference Accuracy) based on raw measurements from independent sites (e.g. IGS), Galileo Ground Sensor Stations (GSS) or an own regional monitoring network. Secondly, the differences of orbits and satellite clock corrections between Galileo broadcast ephemeris and the precise reference ephemeris generated by GalTeC will also be compared to check the SIS accuracy. Thirdly, in the user domain, SIS based navigation solution PVT on reference sites using Galileo broadcast ephemeris and the precise ephemeris generated by GalTeC are also used to check key performance parameters. In order to demonstrate the GalTeC performance and the methods mentioned above, the paper presents an initial test result using GPS raw data and GPS broadcast ephemeris. In the tests, some Galileo typical performance parameters are used for GPS system. For example, the maximum URA for one day for one GPS satellite from GPS broadcast ephemeris is used as substitution of SISA to check GPS ephemeris accuracy. Using GalTeC OD&TS and GPS raw data from IGS reference sites, a 10 cm-level of precise orbit determination can be reached. Based on these precise GPS orbits from GalTeC, monitoring and validation of GPS performance can be achieved with a high confidence level. It can be concluded that one of the GalTeC missions is to provide the capability to assess Galileo and general GNSS performance and prediction methods based on a regional and global monitoring networks. Some capability, of which first results are shown in the paper, will be demonstrated further during the planned Galileo IOV phase, the Full Galileo constellation phase and for the different services particularly the Open Services and the Safety Of Life services based on the Galileo Integrity concept.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.10 no.4
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• pp.81-93
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• 2000

In a methodological approach to improve the processing performance of modulo exponentiation which is the primary arithmetic in RSA crypto algorithm, we present a new RSA hardware architecture based on high-radix modulo multiplication and CRT(Chinese Remainder Theorem). By implementing the modulo multiplier using radix-16 arithmetic, we reduced the number of PE(Processing Element)s by quarter comparing to the binary arithmetic scheme. This leads to having the number of clock cycles and the delay of pipelining flip-flops be reduced by quarter respectively. Because the receiver knows p and q, factors of N, it is possible to apply the CRT to the decryption process. To use CRT, we made two s/2-bit multipliers operating in parallel at decryption, which accomplished 4 times faster performance than when not using the CRT. In encryption phase, the two s/2-bit multipliers can be connected to make a s-bit linear multiplier for the s-bit arithmetic operation. We limited the encryption exponent size up to 17-bit to maintain high speed, We implemented a linear array modulo multiplier by projecting horizontally the DG of Montgomery algorithm. The H/W proposed here performs encryption with 15Mbps bit-rate and decryption with 1.22Mbps, when estimated with reference to Samsung 0.5um CMOS Standard Cell Library, which is the fastest among the publications at present.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.117-124
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• 2009

This paper describes a 3 to 5 GHz frequency synthesizer for MB-OFDM (Multi-Band OFDM) UWB (Ultra- Wideband) application using 0.13 ${\mu}m$ CMOS process. The frequency synthesizer operates in the band group 1 whose center frequencies are 3432 MHz 3960 MHz, and 4488 MHz. To cover the overall frequencies of group 1, an efficient frequency planning minimizing a number of blocks and the power consumption are proposed. And, a high-frequency VCO and LO Mixer architecture are also presented in this paper. A new mixed coarse tuning scheme that utilizes the MIM capacitance, the varactor arrays, and the DAC is proposed to expand the VCO tuning range. The frequency synthesizer can also provide the clock for the ADC in baseband modem. So, the PLL for the ADC in the baseband modem can be removed with this frequency synthesizer. The single PLL and two SSB-mixers consume 60 mW from a 1.2 sV supply. The VCO tuning range is 1.2 GHz. The simulated phase noise of the VCO is -112 dBc/Hz at 1 MHz offset. The die area is 2 ${\times}$ 2mm$^2$.