• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.3
• /
• pp.181-185
• /
• 2003

Influence of post gate oxidation anneal on Negative Bias Temperature Instability (NBTI) of PMOSFE has been investigated. At oxidation anneal temperature raised above 950$^{\circ}$C, a significant improvement of NBTI was observed which enables to reduce PMO V$\_$th/ shift occurred during a Bias Temperature (BT) stress. The high temperature anneal appears to suppress charge generations inside the gate oxide and near the silicon oxide interface during the BT stress. By measuring band-to-band tunneling currents and subthreshold slopes, reduction of oxide trapped charges and interface states at the high temperature oxidation anneal was confirmed.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.12 no.9
• /
• pp.1599-1604
• /
• 2008

In this paper, it has been analyzed how transport characteristics is influenced on gate oxide properties in the subthreshold region as nano structure FinFET is fabricated. The analytical model is used to derive transport model, and Possion equation is used to obtain analytical model. The thermionic emission and tunneling current to have an influence on subthreshold current conduction are analyzed for nano-structure FinFET, and subthreshold swings of this paper are compared with those of two dimensional simulation to verify this model. As a result, transport model presented in this paper is good agreement with two dimensional simulation model, and this study shows that the transport characteristics have been changed by gate oxide properties. As gate length becomes smaller, funneling characteristics, one of the most important transport mechanism, have been analyzed.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.10 no.10
• /
• pp.1815-1821
• /
• 2006

In this paper, the subthreshold swing has been analyzed for FinFET under channel length of 20nm. The analytical current model has been developed , including thermionic current and tunneling current models. The potential distribution by Poisson equation and carrier distribution by Maxwell-Boltzman statistics are used to calculate thermionic emission current and WKB(Wentzel-Kramers-Brillouin) approximation to tunneling current. The cutoff current is obtained by simple adding two currents since two current is independent. The subthreshold swings by this model are compared with those by two dimensional simulation and two values agree well. Since the tunneling current increases especially under channel length of 10nm, the characteristics of subthreshold swing is degraded. The channel and gate oxide thickness have to be fabricated as am as possible to decrease this short channel effects, and this process has to be developed. The subthreshold swings as a function of channel doping concentrations are obtained. Note that subthreshold swings are resultly constant at low doping concentration.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.08a
• /
• pp.197-197
• /
• 2011

In this study, in contrast with cases in which Scanning Tunneling Microscopy (STM) tip-induced reactions were instigated by the tunneling electrons, the local electric field, or the mechanical force between a tip and a surface, we found that the tungsten oxide (WO3) covered tungsten (W) tip of a STM acted as a chemical catalyst for the S-H dissociative adsorption of phenylthiol and 1-octanethiol onto a Ge(100) surface. By varying the distance between the tip and the surface, the degree of the tip-catalyzed adsorption could be controlled. We have found that the thiol head-group is the critical functional group for this catalysis and the catalytic material is the WO3 layer of the tip. After removing the WO3 layer by field emission treatment, the catalytic activity of the tip has been lost. 3-mercapto isobutyric acid is a chiral bi-functional molecule which has two functional groups, carboxylic acid group and thiol group, at each end. 3-Mercapto Isobutyric Acid adsorbs at Ge(100) surface only through carboxylic acid group at room temperature and this adsorption was enhanced by the tunneling electrons between a STM tip and the surface. Using this enhancement, it is possible to make thiol group-terminated surface where we desire. On the other hand, surprisingly, the WO3 covered W tip of STM was found to act as a chemical catalyst to catalyze the adsorption of 3-mercapto isobutyric acid through thiol group at Ge(100) surface. Using this catalysis, it is possible to make carboxylic acid group-terminated surface where we want. This functional group-selective adsorption of bi-functional molecule using the catalysis may be used in positive lithographic methods to produce semiconductor substrate which is terminated by desired functional groups.

• Journal of the Korean Magnetics Society
• /
• v.9 no.6
• /
• pp.291-295
• /
• 1999

$NiFe/Co/Al_2O_3/Co/IrMn$ tunneling junctions were grown on (100)Si wafer and their spin-valve tunneling magnetoresistance (TMR) was studied. The tunneling junctions were grown by using a 5-gun RF/DC magnetron sputter. $Al_2O_3$ barrier layer was formed by exposing Al layer to oxygen atmosphere at 6$0^{\circ}C$ for 72 hours. Strong exchange coupling interaction is observed between the ferromagnetic Co and the antiferromagnetic IrMn of Co/IrMn bilayer when IrMn is 100$\AA$ thick. $NiFe(183\;{\AA})/Co(17\;{\AA})/Al_2O_3(16\;{\AA})/Co(100\;{\AA})/IrMn(100\;{\AA})$ tunneling junction shows best TMR ratio of about 10% in the applied magnetic field range of $\pm$20 Oe. The TMR ratio is improved about 23% and electrical resistance is decreased about 34% when annealed at 200 $^{\circ}C$ for 1 hour in magnetic field of 330 Oe, parallel to the bottom electrode. With increasing the active area of junction the TMR ratio increases while electrical resistance decreases.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.2
• /
• pp.881-883
• /
• 2005

In case is below length 100nm of gate, various kinds problem can be happened with by threshold voltage change of device, occurrence of leakage current by tunneling because thickness of oxide by 1.5nm low scaling is done and doping concentration is increased. SiO$_2$ dielectric substance can not be used for gate insulator because is expected that tunneling current become 1A/cm$^2$ in 1.5nm thickness low. In this paper, devised double gate MOSFET(DGMOSFET) to decrease effect of leakage current by this tunneling. Therefore, could decrease effect of these leakage current in thickness 1nm low of SiO$_2$ dielectric substance. But, very big gate insulator of permittivity should be developed for develop device of nano scale.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2006.05a
• /
• pp.865-868
• /
• 2006

In this paper, the subthreshold swing has been analyzed for double gate FinFET under channel length of 20nm. The analytical current model has been developed, including thermionic current and tunneling current models. The potential distribution by Poisson equation and carrier distribution by Maxwell-Boltzman statistics are used to calculate thermionic emission current, and WKB(Wentzel-Framers-Brillouin) approximation to tunneling current. The cutoff current is obtained by simple adding two currents since two current is independent. The subthreshold swings by this model are compared with those by two dimensional simulation and two values are good agreement. Since the tunneling current increases especially under channel length of 10nm, the characteristics of subthreshold swing is degraded. The channel and gate oxide thickness have to be fabricated as thin as possible to decrease this short channel effects and this process has to be developed. The subthreshold swings as a function of channel doping concentrations are obtained.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2006.05a
• /
• pp.869-872
• /
• 2006

In this paper, the threshold voltage roll-off been analyzed for nano structure double gate FinFET. The analytical current model has been developed , including thermionic current and tunneling current models. The potential distribution by Poisson equation and carrier distribution by Maxwell-Boltzman statistics are used to calculate thermionic emission current, and WKB(Wentzel- framers-Brillouin) approximation to tunneling current. The threshold voltage roll-offs are obtained by simple adding two currents since two current is independent. The threshold voltage roll-off by this model are compared with those by two dimensional simulation and two values are good agreement. Since the tunneling current increases especially under channel length of 10nm, the threshold voltage roll-off Is very large. The channel and gate oxide thickness have to be fabricated as thin as possible to decrease this short channel effects and this process has to be developed.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.11 no.4
• /
• pp.760-765
• /
• 2007

In this paper, the threshold voltage roll-off and drain induced barrier lowering(DIBL) have been analyzed for nano structure double gate FinFET. The analytical current model has been developed, including thermionic current and tunneling current models. The potential distribution by Poisson equation and carrier distribution by Maxwell-Boltzman statistics were used to calculate thermionic omission current, and WKB(Wentzel- Kramers-Brillouin) approximation to tunneling current. The threshold voltage roll-offs are obtained by simple adding two currents since two current is independent. The threshold voltage roll-off by this model are compared with those by two dimensional simulation and two values are good agreement. Since the tunneling current increases especially under channel length of 10nm, the threshold voltage roll-off and DIBL are very large. The channel and gate oxide thickness have to be fabricated as thin as possible to decrease this short channel effects, and this process has to be developed.

• Journal of IKEEE
• /
• v.23 no.1
• /
• pp.29-34
• /
• 2019

We investigated on-off voltage ${\Delta}V_{on-off}$ of sub-10 nm JLCSG (Junctionless Cylindrical Surrounding Gate) MOSFET. The gate voltage was defined as ON voltage for the subthreshold current of $10^{-7}A$ and OFF voltage for the subthreshold current of $10^{-12}A$, and the difference between ON and OFF voltage was obtained. Since the tunneling current was not negligible at 10 nm or less, we observe the change of ${\Delta}V_{on-off}$ depending on the presence or absence of the tunneling current. For this purpose, the potential distribution in the channel was calculated using the Poisson equation and the tunneling current was calculated using the WKB approximation. As a result, it was found that ${\Delta}V_{on-off}$ was increased due to the tunneling current in JLCSG MOSFETs below 10 nm. Especially, it increased rapidly with channel lengths less than 8 nm and increased with increasing channel radius and oxide thickness.