• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제49권9호
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• pp.523-526
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• 2000

A dual gate trench emitter IGBT structure is proposed and studied numerically using the device simulator MEDICI. The on-state forward voltage drop latch-up current density turn-off time and breakdown voltage of the proposed structure are compared with those of the conventional DMOS-IGBT and trench gate IGBT structures. The proposed structure forms an additional channel and increases collector current level resulting in reduction of on -state forward voltage drop. In addition the trench emitter increases latch-up current density by 148% in comparison with that for the conventional DMOS-IGBT and by 83% compared with that for the trench gate IGBT without degradation in breakdown voltage when the half trench gate width(Tgw) and trench emitter depth(Ted) are fixed at $1.5\mum\; and\; 2\mum$, respectively

• 한국전기전자재료학회논문지
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• 제19권10호
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• pp.912-917
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• 2006

In this paper, Trench emitter electrode IGBT structure is proposed and studied numerically using the device simulator, MEDICI. The breakdown voltage, on-state voltage drop, latch up current density and turn-off time of the proposed structure are compared with those of the conventional trench gate IGBT(TIGBT) structures. Enhancement of the breakdown voltage by 19 % is obtained in the proposed structure due to dispersion of electric field at the edge of the bottom trench gate by trench emitter electrode. In addition, the on-state voltage drop and the latch up current density are improved by 25 %, 16 % respectively. However increase of turn-off time in proposed structures are negligible.

• 한국전기전자재료학회논문지
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• 제32권5호
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• pp.366-370
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• 2019

In this paper, a single N+ emitter trench gate-type insulated gate bipolar transistor (IGBT) device was studied using T-CAD, in order to achieve a low on-state voltage drop (Vce-sat) and high breakdown voltage, which would reduce power loss and device reliability. Using the simulation, the threshold voltage, breakdown voltage, and on-state voltage drop were studied as a function of the temperature, the length of time in the diffusion process (drive-in) after implant, and the trench gate depth. During the drive-in process, a $20^{\circ}C$ change in temperature from 1,000 to $1,160^{\circ}C$ over a 150 minute time frame resulted in a 1 to 4 V change in the threshold voltage and a 24 to 2.6 V change in the on-state voltage drop. As a result, a 0.5 um change in the trench depth of 3.5 to 7.5 um resulted in the breakdown voltage decreasing from 802 to 692 V.

• 한국전기전자재료학회논문지
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• 제17권3호
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• pp.259-266
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• 2004

In this paper. a new two types of EST(Emitter Switched Thyristor) structures are proposed to improve the electrical characteristics including the current saturation capability. Besides, the two dimensional numerical simulations were carried out using MEDICI to verify the validity of the device and examine the electrical characteristics. First, a vortical trench electrode EST device is proposed to improve snap-back effect and its blocking voltage. Second, a dual trench gate EST device is proposed to obtain high voltage current saturation characteristics and high blocking voltage and to eliminate snap-back effect. The two proposed devices have superior electrical characteristics when compared to conventional devices. In the vertical trench electrode EST, the snap-back effect is considerably improved by using the vertical trench gate and cathode electrode and the blocking voltage is one times better than that of the conventional EST. And in the dual trench gate EST, the snap-back effect is completely removed by using the series turn-on and turn-off MOSFET and the blocking voltage is one times better than that of the conventional EST. Especially current saturation capability is three times better than that of the other EST.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 춘계학술대회 논문집 기술교육전문연구회
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• pp.27-30
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• 2003

In this paper, the new dual trench gate Emitter Switched Thyristor (DTG-EST) is proposed for improving snap-back effect which leads to a lot of serious problems of device applications. And the parasitic thyristor that is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The conventional EST exhibits snap-back with the anode voltage and current density 2.73V and $35A/cm^2$, respectively. But the proposed DTG-EST exhibits snap-back with the anode voltage and current density 0.96V and $100A/cm^2$, respectively.

• 한국컴퓨터산업교육학회:학술대회논문집
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• 한국컴퓨터산업교육학회 2003년도 제4회 종합학술대회 논문집
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• pp.71-74
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• 2003

A vertical trench electrode type EST has been proposed in this paper. The proposed device considerably improve the snap-back effect which leads to a lot of problem of device applications. In this paper, the vertical dual gate Emitter Switched Thyristor(EST) with trench electrode has been proposed for improving snap-back effect. It is observed that the forward blocking voltage of the proposed device is 800V. The conventional EST of the same size were no more than 633V. Because the proposed device was constructed of trench-type electrode, the electric field moved toward trench-oxide layer, and the punch through breakdown of the proposed EST is occurred at latest.

• 한국전기전자재료학회논문지
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• 제23권3호
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• pp.183-189
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• 2010

In this paper, the trench gate emitter switched thyristor(EST) withl trench gate electrode is proposed for improving snap-back effect which leads to a lot of problems in device applications. The parasitic thyristor which is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The dual trench gate allows homogenous current distribution in the EST and preserves the unique feature of the gate controlled current saturation of the thyristor current. The characteristics of the 1700 V forward blocking EST obtained from two-dimensional numerical simulations (MEDICI) is described and compared with that of a conventional EST. we carried out layout, design and process of EST devices.

• 전자공학회논문지A
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• 제28A권9호
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• pp.743-751
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• 1991

This paper presents the 1.5\ulcorner PSA bipolar device which establishes the performance improvement such as the reduction of emitter resistance and substrate junction capacitance. To achieve the above electrical characteristics, RTA process and trench isolation technology were adapted. The emitter resistance and substrate capacitance of npn transistor having 1.5$[\times}6{\mu}m^{2}$emitter area was measured with 63$\Omega$and 28fF, respectively. The minimum propagation delay time shows 121ps at 0.7mW from the measurement of 31 stage ring oscillator.

• 한국전기전자재료학회논문지
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• 제33권2호
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• pp.83-87
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• 2020

In this letter, we propose and analyze a new asymmetric structure that can be used for next-generation power semiconductor devices. We compare and analyze the electrical characteristics of the proposed device with respect to those of symmetric devices. The proposed device has a p-emitter on the right side of the cell. The peak electric field is reduced by the shielding effect caused by the p-emitter structure. Consequently, the breakdown voltage is increased. The proposed asymmetric structure has an approximately 100% higher Baliga's figure of merit (~94.22 MW/㎠) than the symmetric structure (~46.93 MW/㎠), and the breakdown voltage of the device increases by approximately 70%.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.392-395
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• 2003

For the first time, the new dual trench gate Emitter Switched Thyristor is proposed for eliminating snap-back effect which leads to a lot of serious problems of device applications. Also, the parasitic thyristor that is inherent in the conventional EST is completely eliminated in the proposed EST structure, allowing higher maximum controllable current densities for ESTs. Moreover, the new dual trench gate allows homogenous current distribution throughout device and preserves the unique feature of the gate controlled current saturation of the thyristor current. The conventional EST exhibits snap-back with the anode voltage and current density 2.73V and $354/{\S}^2$, respectively. But the proposed EST exhibits snap-back with the anode voltage and current density 0.93V and $58A/{\S}^2$, respectively. Saturation current density of the proposed EST at anode voltage 6.11V is $3797A/{\S}^2$. The characteristics of 700V forward blocking of the proposed EST obtained from two dimensional numerical simulations (MEDICI) is described and compared with that of the conventional EST.