• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.4
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• pp.721-726
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• 2017

We fabricated stretchable thin-film transistors(TFTs) on a polydimethylsiloxane substrate with patterned polyimide island structures by using an amorphous InGaZnO semiconductor and parylene gate insulator. The TFTs exhibited a field- effect mobility of $5cm^2V^{-1}s^{-1}$ and a current on/off ratio of $10^5$ at a relatively low operating voltage. Furthermore, the fabricated transistors showed no noticeable changes in their electrical performance for large strains of up to 50 %.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.110.2-110.2
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• 2012

We reported on antireflective ZnSnO (ZTO)/Ag bilayer and ZTO/Ag/ZTO trilayer source/drain (S/D) electrodes for all-transparent ZTO channel based thin film transistors (TFTs). The ZTO/Ag bilayer is more transparent (83.71%) and effective source/drain (S/D) electrodes for the ZTO channel/Al2O3 gate dielectric/ITO gate electrode/glass structure than ZTO/Ag/ZTO trilayer because the bottom ZTO layer in the trilayer increasea contact resistance between S/D electrodes and ZTO channel layer and reduce the antireflection effect. The ZTO based all-transparent TFTs with ZTO/Ag bilayer S/D electrode showed a saturation mobility of 4.54cm2/Vs and switching property (1.31V/decade) comparable to TTFT with Ag S/D electrodes.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.4
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• pp.568-573
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• 1996

The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1103-1107
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• 2005

Single-crystal silicon thin films on glass (SOG) and on fused-quartz (SOQ) were prepared using wafer bonding and hydrogen-induced layer transfer. Thinfilm transistors (TFTs) were subsequently fabricated. The high-temperature processed SOQ TFTs show better device performance than the low-temperature processed SOG TFTs. Tensile and compressive strain was measured respectively on SOQ and SOG. Consistent with the tensile strain, enhanced electron effective mobility was measured on the SOQ TFTs.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.222-222
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• 2010

Transparent semiconductor oxide thin films have been attracting considerable attention as potential channel layers in thin film transistors (TFTs) owing to their several advantageous electrical and optical characteristics such as high mobility, high stability, and transparency. TFTs with ZnO or similar metal oxide semiconductor thin films as the active layer have already been developed for use in active matrix organic light emitting diode (AMOLED). Of late, there have been several reports on TFTs fabricated with InZnO, AlZnSnO, InGaZnO, or other metal oxide semiconductor thin films as the active channel layer. These newly developed TFTs were expected to have better electrical characteristics than ZnO TFTs. In fact, results of these investigations have shown that TFTs with the new multi-component material have excellent electrical properties. In this work, we present TFTs with inverted coplanar geometry and with a novel HfInZnO active layer co-sputtered at room temperature. These TFTs are meant for use in low voltage, battery-operated mobile and flexible devices. Overall, the TFTs showed good performance: the low sub-threshold swing was low and the $I_{on/off}$ ratio was high.

• Transactions on Electrical and Electronic Materials
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• v.18 no.1
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• pp.55-57
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• 2017

Amorphous oxide thin film transistors (TFTs) were fabricated with 0.5 wt% silicon doped zinc tin oxide (a-0.5SZTO) thin film deposited by radio frequency (RF) magnetron sputtering. In order to investigate the effect of annealing treatment on the electrical properties of TFTs, a-0.5SZTO thin films were annealed at three different temperatures ($300^{\circ}C$, $500^{\circ}C$, and $700^{\circ}C$ for 2 hours in a air atmosphere. The structural and electrical properties of a-0.5SZTO TFTs were measured using X-ray diffraction and a semiconductor analyzer. As annealing temperature increased from $300^{\circ}C$ to $500^{\circ}C$, no peak was observed. This provided crystalline properties indicating that the amorphous phase was observed up to $500^{\circ}C$. The electrical properties of a-0.5SZTO TFTs, such as the field effect mobility (${\mu}_{FE}$) of $24.31cm^2/Vs$, on current ($I_{ON}$) of $2.38{\times}10^{-4}A$, and subthreshold swing (S.S) of 0.59 V/decade improved with the thermal annealing treatment. This improvement was mainly due to the increased carrier concentration and decreased structural defects by rearranged atoms. However, when a-0.5SZTO TFTs were annealed at $700^{\circ}C$, a crystalline peak was observed. As a result, electrical properties degraded. ${\mu}_{FE}$ was $0.06cm^2/Vs$, $I_{ON}$ was $5.27{\times}10^{-7}A$, and S.S was 2.09 V/decade. This degradation of electrical properties was mainly due to increased interfacial and bulk trap densities of forming grain boundaries caused by the annealing treatment.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.466-468
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• 2012

Amorphous InGaZnO (${\alpha}$-IGZO) thin-film transistors (TFTs) are are very promising due to their potential use in thin film electronics and display drivers [1]. However, the stability of AOS-TFTs under the various stresses has been issued for the practical AOSs applications [2]. Up to now, many researchers have studied to understand the sub-gap density of states (DOS) as the root cause of instability [3]. Nomura et al. reported that these deep defects are located in the surface layer of the ${\alpha}$-IGZO channel [4]. Also, Kim et al. reported that the interfacial traps can be affected by different RF-power during RF magnetron sputtering process [5]. It is well known that these trap states can influence on the performances and stabilities of ${\alpha}$-IGZO TFTs. Nevertheless, it has not been reported how these defect states are created during conventional RF magnetron sputtering. In general, during conventional RF magnetron sputtering process, negative oxygen ions (NOI) can be generated by electron attachment in oxygen atom near target surface and accelerated up to few hundreds eV by self-bias of RF magnetron sputter; the high energy bombardment of NOIs generates bulk defects in oxide thin films [6-10] and can change the defect states of ${\alpha}$-IGZO thin film. In this paper, we have confirmed that the NOIs accelerated by the self-bias were one of the dominant causes of instability in ${\alpha}$-IGZO TFTs when the channel layer was deposited by conventional RF magnetron sputtering system. Finally, we will introduce our novel technology named as Magnetic Field Shielded Sputtering (MFSS) process [9-10] to eliminate the NOI bombardment effects and present how much to be improved the instability of ${\alpha}$-IGZO TFTs by this new deposition method.

• Transactions on Electrical and Electronic Materials
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• v.11 no.6
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• pp.253-256
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• 2010

Different active layer thicknesses for zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were fabricated with a poly-4-vinyphenol polymeric dielectric using injector type atomic layer deposition. The properties of the ZnO TFTs were influenced by the active thickness and width-to-length (W/L) ratio of the device. The threshold voltage of ZnO TFTs shifted positively as the active layer thickness decreased, while the subthreshold slope decreased. The W/L ratio of ZnO TFTs also affected the mobility and subthreshold slope. An optimized TFT structure exhibited an on-tooff current ratio of above 106 with solid saturation.

• Transactions on Electrical and Electronic Materials
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• v.17 no.3
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• pp.143-145
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• 2016

In order to find suitable source and drain (S/D) electrodes for amorphous InGaZnO thin film transistors (a-IGZO TFTs), the specific contact resistance of interface between the channel layers and various S/D electrodes, such as Ti/Au, a-IZO and multilayer of a-IGZO/Ag/a-IGZO, was investigated using the transmission line model. The a-IGZO TFTs with a-IGZO/Ag/a-IGZO of S/D electrodes had good performance and low contact resistance due to the homo-junction with channel layer. The stability was measured with different electrodes by a positive bias stress test. The result shows the a-IGZO TFTs with a-IGZO/Ag/a-IGZO electrodes were more stable than other devices.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.5
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• pp.117-124
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• 1996

The .mu.c-Si:H films have been deposited by PeCVD at the various conditions such as hydrogen dilution ratio, substrate temperature and RF power density. Then, we studied their electrical and optical properties. Top gate hydrogenated micro-crystalline silicon thin film transistors($\mu$c-Si:H TFTs) using $\mu$-Si:H and a-SiN:H films have been fabricated by FECVD. The electrical characteristics of the devices have been investigated by semiconductor parameter analyzer and compared with amorphous silicon thin film transistors (a-Si:H TFTs). In this study, on/off current ratio, threshold voltage and the field effect mobility of the $\mu$c-Si:H TFT were $3{\times}10^{4}$, 5.06V and 0.94cm$^{2}$Vs, respectively.