• 제목/요약/키워드: substrate thickness

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이온플레팅에 의한 TiN 증착중 계면형성과 박막 미소조직에 관한 연구 (A Study on the Formation of Interface and the Thin Film Microstructure in TiN Deposited by Ion Plating)

  • 여종석;이종민;한봉희
    • 한국표면공학회지
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    • 제24권2호
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    • pp.73-79
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    • 1991
  • Recent studies son surface coatings have shown that the change of physical, chemical and crystallographic structure analysed and observed according to the deposition process variables has the effects on the resultant film properties. Under the same preparation condition conditions of the substrate and process variables, physical morphology variations characterized by substrate temperature and bias which offect the surface mobility of adatom and adhesion variations related to the formation of Ti interlayer were considered in the present study. Microhardness showed the highest value around 40$0^{\circ}C$ of the substrate temperature and increased with the substrate bias. Adhesion was improved with the increase of substrate temperature and bias. An interlayer of pure titanium formed prior to deposition of TiN improves the adhesion at its optimum thickness. These results were explained by the change of physical morphology and phase analysis.

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나노 압입자를 이용한 박막/모재 구조의 계면파괴인성치 평가 (Evaluation of interfacial toughness of film/substrate by nanoindenter)

  • 서병국;엄윤용
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2004년도 춘계학술대회
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    • pp.36-41
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    • 2004
  • A method to measure the interfacial toughness of film/substrate by nanoindenter is proposed. As the thickness of the film decreases, the measurement of the interfacial toughness requires the more sophisticated equipment such as nanoindenter. In this study, the nanoindenter is applied to the substrate near the interface of film/substrate in the direction perpendicular to the normal of the interface, causing the cohesive fracture of the substrate, followed by the interfacial cracking. The specimen of Cu($0.56 {\mu}m$)/Si(530 ${\mu}$) are made by sputtering the copper onto the silicon wafer. By scratching the copper surface, we can make the easy interfacial cracking during the nanoindentation. It is found that the averaged values of the interfacial toughness of the Cu/Si is $0.664{\pm}0.3\;J/m^2$ . The phase angle of the specimen in this study is ${\psi}{\simeq}-36.8^{\circ}$, computed by the method of Suo and Hutchinson.[1]

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양극산화 알루미나 기반의 DRAM 패키지 기판 (Anodic Alumina Based DRAM Package Substrate)

  • 김문정
    • 한국산학기술학회논문지
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    • 제11권3호
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    • pp.853-858
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    • 2010
  • 본 논문은 알루미늄의 양극산화를 통하여 알루미나(Alumina, $Al_2O_3$)를 형성함으로써 알루미나 및 알루미늄의 적층 구조 DRAM 패키지 기판을 구현하였다. 전송선 기반의 설계를 적용하기 위해 2차원 전자장 시뮬레이션을 수행하였다. 분석 결과를 바탕으로 새로운 기판에 적용할 신호선의 폭 및 간격과 알루미나 두께 등의 설계인자를 최적화하였다. 테스트 패턴 제작 및 측정을 통해 설계인자를 검증하였으며, 이를 바탕으로 설계 룰(Design rule)을 정하고 패키지의 개념 설계 및 상세 설계를 진행하여 DDR2 DRAM 패키지 기판을 성공적으로 제작하였다.

기판에 따른 BST 박막의 RF Power 의존성 (Study on RF power dependence of BST thin film by the different substrates)

  • 최명률;이태일;박인철;김홍배
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.22-25
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    • 2002
  • In this paper, we deposited MgO buffer layer on p-type (100)Si substrate in the condition of substrate temperature 400$^{\circ}C$, working gas ratio Ar:O$_2$=80:20, RF Power 50W, working pressure 10mtorr, and the thickness of the film was about 300${\AA}$. Then we deposited Ba$\sub$0.5/Sr$\sub$0.5/TiO$_3$ thin film using RF Magnetron sputtering method on the MgO/Si substrate in various RF power of 25W, 50W, 75W. The film deposited in 50W showed the best crystalline from the XRD measurement. To know the electrical properties of the film, we manufactured Al/BSTMgO(300${\AA}$)/Si/Al structure capacitor. In the result of I-V measurement, The leakage current density of the capacitor was lower than 10$\^$-7/A/$\textrm{cm}^2$ at the range of ${\pm}$150kV/cm. From C-V characteristics of the capacitor, can calculate the dielectric constant and it was 305. Finally we deposited BST thin film on bare Si substrate and (100)MgO substrate in the same deposition condition. From the comparate of the properties of these samples, we found the properties of BST thin film which deposited on MgO/Si substrate were better than on bare Si substrate and similar to on MgO substrate.

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대면적 UV 임프린팅 공정에서 잔류층 두께 예측 (Prediction of Residual Layer Thickness of Large-area UV Imprinting Process)

  • 김국원
    • 반도체디스플레이기술학회지
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    • 제12권2호
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    • pp.79-84
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    • 2013
  • Nanoimprint lithography (NIL) is the next generation photolithography process in which the photoresist is dispensed onto the substrate in its liquid form and then imprinted and cured into a desired pattern instead of using traditional optical system. There have been considerable attentions on NIL due to its potential abilities that enable cost-effective and high-throughput nanofabrication to the display device and semiconductor industry. Although one of the current major research trends of NIL is large-area patterning, the technical difficulties to keep the uniformity of the residual layer become severer as the imprinting area increases more and more. In this paper, with the rolling type imprinting process, a mold, placed upon the $2^{nd}$ generation TFT-LCD glass sized substrate($370{\times}470mm^2$), is rolled by a rubber roller to achieve a uniform residual layer. The prediction of residual layer thickness of the photoresist by rolling of the rubber roller is crucial to design the rolling type imprinting process, determine the rubber roller operation conditions-mpressing force & feeding speed, operate smoothly the following etching process, and so forth. First, using the elasticity theory of contact problem and the empirical equation of rubber hardness, the contact length between rubber roller and mold is calculated with consideration of the shape and hardness of rubber roller and the pressing force to rubber roller. Next, using the squeeze flow theory to photoresist flow, the residual layer thickness of the photoresist is calculated with information of the viscosity and initial layer thickness of photoresist, the shape of mold pattern, feeding speed of rubber roller, and the contact length between rubber roller and mold previously calculated. Last, the effects of rubber roller operation conditions, impressing force & feeding speed, on the residual layer thickness are analyzed with consideration of the shape and hardness of rubber roller.

EDS 분석과 모델링에 의한 박막두께 측정 방법에 관한 연구 (Determination of Thin Film Thickness by EDS Analysis and its Modeling)

  • 윤재진;이원종
    • 한국전기전자재료학회논문지
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    • 제24권8호
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    • pp.647-653
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    • 2011
  • In this study, a method to measure the thickness of thin film by EDS (energy dispersive spectroscopy) is suggested. We have developed a model which calculates the thickness of thin film from the characteristic x-ray intensity ratio of the elements in thin film and substrate by considering incident electron beam energy, x-ray generation curve, backscattering and absorption of x-ray, take-off angle of x-ray and tilt angle of the sample. We obtained the relation curve between the film thickness measured experimentally and the x-ray intensity ratio of elements. The film thicknesses calculated from the model agrees quite well with those measured experimentally. Therefore, the thin film thickness can be measured rapidly and accurately by using the model developed in this study and the x-ray intensity ratio obtained in EDS analysis.

가변 입사각 타원 해석법을 사용한 유리기판위의 이산화규소박막의 굴절율 및 두께 측정 (Measurement of a refractive index and thickness of silicon-dioxide thin film on LCD glass substrate using a variable angle ellipsometry)

  • 방현용;김현종;김상열;김병익
    • 한국광학회지
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    • 제8권1호
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    • pp.31-36
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    • 1997
  • 나트륨 이온의 용출을 방지하기 위해 LCD용 유리기판위에 입혀진 SiO$_{2}$ 박막의 굴절율 및 두께를 측정하였다. 입사각을 고정하고 박막의 두께를 0 .angs.부터 주기 두께까지 20.angs.씩 증가시키며 계산한 타원해석상수와 두께를 고정하고 입사각을 45.deg에서 70.deg까지 1.deg.씩 증가시키며 계산한 타원해석상수를 이용하여 LCD용 유리기판위에 증착된 SiO$_{2}$ 박막의 굴절율 및 두께 측정에서의 최적 측정 조건을 구하였다. 최적 측정 조건에서 굴절율 및 두께의 변화에 따른 타원해석상수 .DELTA.와 .PSI.의 변화를 계산하여 .DELTA.와 .PSI.측정 상의 오차와 비교하여 굴절율 및 두께 결정 시의 오차를 추정하였다. 최적 측정 조건인 Brewster 각 근방에서의 여러 입사각에서 LCD용 유리기판위에 입혀진 SiO$_{2}$ 박막의 타원해석상수 .DELTA.와 .PSI.를 측정하고, 이 측정값에 최적 맞춤하는 SiO$_{2}$ 박막의 굴절율 및 두께를 회귀분석방법을 사용하여 전산 계산하고 분광타원해석법에 의한 박막의 두께 및 굴절율과 비교하였다.

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사각 나선형 평면 인덕터의 주파수 특성에 관한 연구 (Study on Frequency Characteristics of Rectangle Spiral Planar Inductor)

  • 김재욱
    • 한국산학기술학회논문지
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    • 제15권4호
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    • pp.2330-2334
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    • 2014
  • 본 논문에서는 무선 신호전송을 위한 비접촉 방식의 AC커플링(Coupling)기반 평면 나선형 인덕터의 주파수 특성을 분석하였다. 기판의 유전상수의 변화는 소자의 인덕턴스에 직접적인 영향을 주지 않고 소자의 전기용량에 영향을 주어 공진주파수를 변화시키는 것을 알 수 있다. 기판의 두께가 증가할수록 인덕턴스는 증가하지만 공진주파수는 감소하였으며, 이것은 기판 두께의 감소로 인해 내부 전기용량이 증가하였기 때문이다. 인덕터의 도체 선 폭이 증가하여도 전체 인덕터 크기와 턴 수 및 선 간격이 일정함으로 내부 사각 코일의 도선 면적이 작아지게 되어 각각의 자기 인덕턴스가 감소하게 되고 공진주파수는 증가되게 된다. 또한, 도체의 선 간격이 증가하면 내부 사각 코일의 도선 면적이 작아지게 된다.

Strain relaxed Co nanocrystals formation from thin films on sapphire substrate induced by nano-second laser irradiation

  • 서옥균;강덕호;손준곤;최정원;하성수;김선민;강현철;노도영
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.145.2-145.2
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    • 2016
  • We report the phase transformation of Co thin films on a sapphire substrate induced by laser irradiation. As grown Co films were initially strained and tetragonally distorted. With low power laser irradiation, the surface was ruptured and irregular holes were formed. As the laser power was increased, the films changed into round shape Co nanocrystals with well-defined 6-fold structure. By measuring the XRD of Co nanostructure as a function of laser energy densities, we found that the change of morphological shapes from films to nanocrystals was accompanied with decrease of the tetragonal distortion as well as strain relaxation. By measuring the size distribution of nanocrystals as a function of film thickness, the average diameter is proportional to 1.7 power of the film thickness which was consistent with the prediction of thin film hydrodynamic (TFT) dwetting theory. Finally, we fabricated the formation of size controlling nanocrystals on the sapphire substrate without strain.

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Embedded Resistor 적용을 위한 Organic 기판 위에 균일한 두께의 형상을 갖는 저항체의 제조공정과 편차에 대한 조사 (Investigation on Fabrication Process and Tolerance of Resistance Body with A Uniform Thickness Shape on Organic Substrate for Application of Embedded Resistor)

  • 박화선
    • 대한전자공학회논문지SD
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    • 제45권4호
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    • pp.72-77
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    • 2008
  • 본 논문에서는 Embedded resistor 적용을 위한 오개닉 기판 위에 캐버티(Cavity) 공정에 의해서 형성된 균일한 두께를 갖는 저항체의 제조 방법과 저항편차에 대해서 조사했다. 기존의 스크린 프린팅에 의해서 발생하는 PCB의 위치에 따른 저항값의 편차를 개선하기 위하여 캐버티 공정을 소개했다. 원하는 모양과 부피를 갖는 저항은 스크린 프린팅과 페이스트를 이용하여 cavity 공정에 의해 정확하게 형성되어 졌다. 이 방법은 PCB의 생산 공정시간을 줄일 수 있고, 스크린 프린팅의 정밀도에 의한 큰 영향 없이 빠르게 공정 조건을 배치할 수 있으므로써 생산량을 개선시킬 수 있다.