• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.3
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• pp.1284-1287
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• 2012

In this study, we propose the structures of octagonal spiral planar inductors without underpass and via, and confirm the frequency characteristics. The structures of inductors have Si thickness of $300{\mu}m$, $SiO_2$ thickness of $7{\mu}m$. The width of Cu coils and the space between segments have $20{\mu}m$, respectively. The number of turns of coils have 3. The performance of spiral planar inductors was simulated to frequency characteristics for inductance, quality-factor, SRF(Self- Resonance Frequency) using HFSS. The octagonal spiral planar inductors have inductance of 2.5nH over the frequency range of 0.8 to 1.8 GHz, quality-factor of maximum 18.9 at 5 GHz, SRF of 11.1 GHz. Otherwise, square spiral planar inductors have inductance of 2.8nH over the frequency range of 0.8 to 1.8 GHz, quality-factor of maximum 18.9 at 4.9 GHz, SRF of 10.3 GHz.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.2105-2107
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• 2004

In this study, Spiral inductors on the $SiO_2$/Si(100) substrate were fabricated by the magnetron sputtering method. Cu thin film with the thickness of 2 ${\mu}m$ was deposited on the substrate. Also we fabricated square inductors through the wet chemical etching technique. The inductors are completely specified by the turn width and the spacing between spirals. Both the width and spacing between spirals were varied from 10 to 60 ${\mu}m$ and from 20 to 70 ${\mu}m$, respectively. Inductance and Q factor dependent on the RF frequency were investigated to analyze performance of inductor arrays. Also, We recommend that the reasonable Q-factors, spec's turns and thickness of the coil for inductors cab be set to be ideal condition.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.10
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• pp.17-24
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• 2000

An area efficient and symmetric dual-level spiral inductor structure is proposed and evaluated in comparison with the conventional single-level spiral inductors. Contrary to the dual-level inductor mutual coupling coefficient of the upper-and lower-level inductors of the dual-level inductor increases with the increases in the number of turns. Because of this, for the same silicon area, the inductances of the dual-level incuctors are 2.5-4 times higher than that of the single-level inductor. Furthermore, the dual-level showed better quality factor that the single-level inductors for the same inductance. It is the intention of this paper to demonstrate that the dual-level can be more useful for the RF integrated circuits than the conventional single-level spiral inductors form the aspects of area efficiency and quality factor. The proposed dual-level inductors are designed and confirmed to be perfectly symmetric, and can also be used as a high-frequency choke.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.9
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• pp.4126-4130
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• 2012

In this paper, we proposed planar spiral inductors based on AC coupling for high-frequency wireless signal transmission. Design and characteristics of various structures of the inductor were analyzed. Capacitance between the inductors can be reduced by positioning two thin-film inductors in parallel. So two structures were proposed. First structure is inter-diagonal structure. This structure was made not to overlap the wire part of the paralleled two inductors. Second structure is On-chip type structure that the two thin-film inductors were in parallel but located on diagonal line not to face each other. The resonance in this structure was reduced from twice to once by increasing horizontal distance between the two thin-film inductors, because the capacitance effect between the two thin-film inductors decreases when the distance between the two inductors increases.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.12
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• pp.125-130
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• 2004

The characteristics of on-chip spiral rectangular inductors in CMOS process are investigated through the simulation and experiment. The ADS-momentum is used for EM simulation, and the spiral inductors are fabricated with Hynix 0.35㎛ CMOS process. This research mainly concerned the effects of the geometric change in terms of the number of turns and the width of micro strip line. The measured and simulated results show that the Hynix 0.35㎛ process could support a top metal spiral inductor of 1nH to 6nH with Q-factor less than 5.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.149-167
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• 2004

Passive components are indispensable in the design and development of microchips for high-frequency applications. Inductors in particular are used frequently in radio frequency (RF) IC's such as low-noise amplifiers and oscillators. This paper gives a broad overview on the on-chip spiral inductors. The design concept and modeling approach of the typical square-shaped spiral inductor are first addressed. This is followed by the discussions of advanced structures for the enhancement of inductor performance. Research works reported in the literature are summarized to aid the understanding of the recent development of such devices.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.8
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• pp.22-29
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• 2007

A 2.5Gb/s 2:1 multiplexer(MUX) IC using $0.18{\mu}m$ CMOS was designed and fabricated. Inductive peaking technology was used to improve the performance. On-chip micro spiral inductor was designed to maximize the inductive peaking effect without increasing the chip area much. The designed 4.7 nH micro-spiral inductor was $20\times20{\mu}m2$ in size. 2:1 MUX with and without micro spiral inductors were compared. The rise and fall time was improved more than 23% and 3% respectively using the micro spiral inductors for 1.25Gb/s signal. For 2.5 Gb/s signal, fall and rise time was improved 5.3% and 3.5% respectively. It consumed 61mW and voltage output swing was 1$180mV_{p-p}$ at 2.5Gb/s.

• Journal of IKEEE
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• v.12 no.3
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• pp.138-143
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• 2008

In this study, we propose that the structures of spiral inductors have the environment advantage utilizing direct-write and LAM(Laser Ablation of Microparticles) processes without process step of lithography and etching etc. of existing semiconductor process. The structures of inductors have Si thickness of 540${\mu}m$, $SiO_2$ thickness of 3${\mu}m$. The width of Cu coils and the space between segments have 30${\mu}m$, respectively, using for direct-write and LAM processes. The performance of spiral planar inductors was simulated to frequency characteristics for inductance, quality-factor, SRF(Self- Resonance Frequency) using HFSS. The inductors without underpass and via have inductance of 1.11nH over the frequency range of 300 to 800 MHz, quality-factor of maximum 38 at 5 GHz, SRF of 18 GHz. Otherwise, inductors with underpass and via have inductance of 1.12nH over the frequency range of 300 to 800 MHz, quality-factor of maximum 35 at 5 GHz, SRF of 16 GHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.7
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• pp.1296-1303
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• 1994

In this paper, a design of active inductors and their application in a frequency converter are proposed. In MMIC design, passive spiral inductor takes larger area than any other passive and active elements. A conventional spiral inductor generates undesired crosstalk, and its performance cannot have certainty and reproducibility. Meanwhile the active inductor eliminates these drawbacks, and operates for much wider bandwidth. Furthermore, its size is smaller and nearly independent of inductance. the performance of MMIC frequency converter with active inductors is directly compared with that of the frequency converters with spiral inductors. The size is 28.6% smaller with better performance in MMIC frequency converter.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1776-1778
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• 2000

The demands placed on portable wireless communication equipment include low cost, low supply voltage, low power, dissipation, low noise, high frequency of operation, and low distortion. These design requirements cannot be met satisfactorily in many cases without the use of RF inductors. However, implementing the inductor on-chip has been regarded as an impractical task because of excessive substrate capacitance and substantial resistive losses due to metallization and the conductive silicon substrate. Hence, there is a great incentive to design, optimize, and model spiral inductors on Si substrate. So, we analyzed a chip inductors using electromagnetic analysis and established a set of design rules for rectangular spiral inductors.