• 제목/요약/키워드: simulated device

검색결과 618건 처리시간 0.023초

유기 발광 소자의 광추출 효율 향상을 위한 마이크로 렌즈 어레이의 시뮬레이션 (Simulation of Microlens Array for the Improvement of Outcoupled Efficiency of Organic Light-emitting Diodes)

  • 황덕현;김혜숙;이원재;이승훈;김태완
    • 한국전기전자재료학회논문지
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    • 제26권10호
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    • pp.745-753
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    • 2013
  • Performance of organic light-emitting diodes incorporating microlens array was simulated using a Light Tools software. Use of microlens array can help the light to escape out of the device. We simulated a reference device that is consisted of reflection layer, emissive layer, and flat transparent substrate. And in this reference device, outcoupled efficiency of 22% was obtained. Several shapes of microlens were applied such as hemisphere, trapezoid, cone, and rectangular parallelepiped. The results showed the improvement of outcoupled efficiency of the device with microlens compared to that of the reference one. And from the analyses of the simulated data, the obtained appropriate shape of microlens is hemisphere, and the improvement of the device with hemispherical lens is 57% higher than that of the reference one.

모사 광전자 소자 상에 적용한 마이크로렌즈 어레이의 UV 성형 (UV molding of Microlens Array on the Simulated Optoelectronic Device)

  • 구승완;김석민;강신일;손현주
    • 한국소성가공학회:학술대회논문집
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    • 한국소성가공학회 2003년도 추계학술대회논문집
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    • pp.377-380
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    • 2003
  • Recently, demand of digital products with optoelectronic device is increasing rapidly. A microlens array is applied to improve optical efficiency on optoelectronic device, and it is usually fabricated by photolithography and reflow process after planarization layer coating process. UV molding process is more suitable for mass production of high quality microlens array than photolithography and reflow process. In the present study, microlens array was fabricated on the simulated optoelectronic device with planarization layer by aligned UV molding process. The shape of replicated microlens was measured, and the section image of molded part was examined.

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실증용 탈피복 장치를 이용한 모의 핵연료 슬릿팅 시험 (Slitting Test of Simulated Fuel Rod by Using a Newly Developed Decladding Device)

  • 정재후;홍동희;김영환;박병석;이종광
    • 한국소성가공학회:학술대회논문집
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    • 한국소성가공학회 2006년도 춘계학술대회 논문집
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    • pp.141-144
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    • 2006
  • In this study, we developed a decladding device which separates 250 mm length of simulated nuclear spent fuel rod into the pallets and the pieces of the hulls after inserting the rod cut into the module with several pairs of blades. To improve the performance of the equipment, we considered some mechanisms to prevent the rod cut from being exposed or bounced into the hot-cell, to reduce the operation time, and to insert the rods automatically. It is expected that the newly developed system will contribute to prevent radioactive pollution in the hot-cell, reduce the operation time, and to increase the safety of the operators. As a result of the performance test for some mockup fuel rod cuts in the ACP(Advanced Spent Fuel Control Process) facility, it was verified that the decladding device could be applied to the actual fuel rod cut. And it will be able to use for a scale-up facility in the future.

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Quasi-SOI LDMOSFET의 전기적 특성 (Electrical Characteristics of Quasi-SOI LDMOSFET)

  • 정두연;이종호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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    • pp.234-237
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    • 2000
  • In this paper, a method to implement new Quasi-SOI LDMOSFET is introduced and the electrical characteristics of the device are studied. Key process steps of the device are explained briefly. By performing process and device simulations, electrical characteristics of the device are investigated, with emphasis on the optimization of the tilt angle of p$\^$0/ channel region. The electrical properties of the Quasi-SOI device are compared with those of bulk and SOI devices with the same process parameters. Simulated device characteristics are threshold voltage, off-state leakage current, subthreshold swing, DIBL, output resistance, lattice temperature, I$\_$D/-V$\_$Ds/, and cut-off frequency.

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Investigating the effect of changing parameters in the IEC device in comparative study

  • H. Ghammas;M.N. Nasrabadi
    • Nuclear Engineering and Technology
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    • 제56권1호
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    • pp.292-300
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    • 2024
  • Kinetic simulations have been performed on an Inertial Electrostatic Confinement Fusion (IECF) device. These simulations were performed using the particle-in-cell (PIC) method to analyze the behavior of ions in an IEC device and the effects of some parameters on the Confinement Time (CT). CT is an essential factor that significantly contributes to the IEC's performance as a nuclear fusion device. Using the PIC method, the geometry of a two-grided device with variable grid radius, the number of cathode grid rings, variable pressure and different dielectric thickness for the feed stalk was simulated. In this research, with the development of previous works, the interaction of particles was simulated and compared with previous results. The simulation results are in good agreement with the previous results. In these simulations, it was found that with the increase of the dielectric thickness of the feed stalk, the electric field was weakened and as a result, the confinement time was reduced. On the other hand, with the increase of the cathode radius, the confinement time increased. Using the results, an IEC device can be designed with higher efficiency and more optimal CT for ions.

시뮬레이티드 어닐링을 이용한 신뢰도 최적 소자배치 연구 (A Study on Reliability-driven Device Placement Using Simulated Annealing Algorithm)

  • 김주년;김보관
    • 대한전자공학회논문지SD
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    • 제44권5호
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    • pp.42-49
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    • 2007
  • 본 논문에서는 열전도 환경하의 MCM과 진공에서 작동하는 우주전자 장비의 신뢰도 최적화를 위한 부품 배치 연구에 관해 기술하고 있다. 최적배치를 위해 초기 부품 배치 후 FDM을 solver로 이용하여 부품의 접합온도를 계산하였으며 접합온도를 이용하여 전자장치의 신뢰도를 예측한 후 시뮬레이티드 어닐링 방법을 통해 신뢰도 최적배치 결과가 기술되었다. 시뮬레이티드 어닐링 적용 시 흔들기는 부품 치환방식을 이용하였으며 온도 감소계수 및 열 평형 계수의 변화에 따른 시뮬레이션 결과를 기술하였으며 특히 장치의 고장률 최소화 목적함수와 평균 접합온도 최소화 목적함수에 대해 각 적용결과에 대한 비교분석을 통하여 새로운 신뢰도 최적화 접근방법을 제안하였다.

IOMMU Para-Virtualization for Efficient and Secure DMA in Virtual Machines

  • Tang, Hongwei;Li, Qiang;Feng, Shengzhong;Zhao, Xiaofang;Jin, Yan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제10권12호
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    • pp.5375-5400
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    • 2016
  • IOMMU is a hardware unit that is indispensable for DMA. Besides address translation and remapping, it also provides I/O virtual address space isolation among devices and memory access control on DMA transactions. However, currently commodity virtualization platforms lack of IOMMU virtualization, so that the virtual machines are vulnerable to DMA security threats. Previous works focus only on DMA security problem of directly assigned devices. Moreover, these solutions either introduce significant overhead or require modifications on the guest OS to optimize performance, and none can achieve high I/O efficiency and good compatibility with the guest OS simultaneously, which are both necessary for production environments. However, for simulated virtual devices the DMA security problem also exists, and previous works cannot solve this problem. The reason behind that is IOMMU circuits on the host do not work for this kind of devices as DMA operations of which are simulated by memory copy of CPU. Motivated by the above observations, we propose an IOMMU para-virtualization solution called PVIOMMU, which provides general functionalities especially DMA security guarantees for both directly assigned devices and simulated devices. The prototype of PVIOMMU is implemented in Qemu/KVM based on the virtio framework and can be dynamically loaded into guest kernel as a module, As a result, modifying and rebuilding guest kernel are not required. In addition, the device model of Qemu is revised to implement DMA access control by separating the device simulator from the address space of the guest virtual machine. Experimental evaluations on three kinds of network devices including Intel I210 (1Gbps), simulated E1000 (1Gbps) and IB ConnectX-3 (40Gbps) show that, PVIOMMU introduces little overhead on DMA transactions, and in general the network I/O performance is close to that in the native KVM implementation without IOMMU virtualization.

SA 기법을 이용한 광디스크 드라이브 공기베어링 슬라이더의 최적설계 (The Optimal Design of Air Bearing Sliders of Optical Disk Drives by Using Simulated Annealing Technique)

  • 장혁;김현기;김광선;임경화
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2001년도 춘계학술대회논문집C
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    • pp.316-321
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    • 2001
  • The optical storage device has recently experienced significant improvement, especially for the aspects of high capacity and fast transfer rate. However, it is necessary to study a new shape of air bearing surface for the rotary type actuator because the optical storage device has the lower access time than that of HDD (Hard Disk Drives). In this study, we proposed the air bearing shape by using SA (Simulated Annealing) algorithm which is very effective to achieve the global optimum instead of many local optimums. The objective of optimization is to minimize the deviation in flying height from a target value 100nm. In addition, the pitch and roll angle should be maintained within the operation limits.

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무선 센서용 표면탄성파의 3 차원 모델링 (3D modeling of a surface acoustic wave for wireless sensors)

  • 트렌 녹 쿵;정귀상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.111-111
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    • 2009
  • In this work, we discuss simulation of surface acoustic wave device using Comsol Multiphysics. The structure SAW device based on piezoelectric thin film aluminum-nitride (AlN) on silicon was simulated. Some parameters of SAW device such as surface velocity, displacement of piezoelectric thin film were evaluated by software. Many modes and shapes of wave are also discussed in this paper. For evaluation physical parameters of AlN piezoelectric layer, the SAW resonator was modeled and simulation results were also compared with experiment results. we simulated arid evaluated the surface Rayleigh wave of AlN thin film on silicon substrate. Results simulation and experiment showed the surface velocity of AlN thin film was about 5200 m/s and shape of surface wave was also displayed. This paper has also proposed as method to study SAW characteristic of piezoelectric thin film and found out measurement values accurately of film such as stiffness matrix, piezoelectric matrix. These values are very important in calculation and design SAW device or MEMS device based on AlN piezoelectric layer.

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새로운 구조의 고속-고내압 SOI Smart Power 소자 설계에 관한 연구 (A Study on the Design of the New Structural SOI Smart Power Device with High Switching Speed and Voltage Characteristics)

  • 원명규;구용서;안철
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.239-242
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    • 1999
  • In this paper, we report the process/device design of high-speed, high-voltage SOI smart power IC for mobile communication system, high-speed HDD system and the electronic control system of automobiles. The high voltage LDMOS with 70V breakdown voltage under 0.8${\mu}{\textrm}{m}$ design rule, the high voltage bipolar with 40V breakdown voltage for analog signal processing, the high speed bipolar with cut-off frequency over 20㎓ and LDD NMOS for high density were proposed and simulated on a single chip by the simulator DIOS and DESSIS. And we extracted the process/device parameters of the simulated devices.

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