• Title/Summary/Keyword: signal design

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Signal line potential variation analysis and modeling due to switching noise in CMOS integrated circuits (CMOS 집적회로에서 스위칭 노이즈에 의한 신호선의 전압변동 해석 및 모델링)

  • 박영준;김용주;어영선;정주영;권오경
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.7
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    • pp.11-19
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    • 1998
  • A signal line potential variation due to the delta-I noise was physically investigated in CMOS integrated circuits. An equivalent circuit for the noise analysis was presented. The signal line was modeled as segmented RC-lumped circuits with the ground noise. Then the equivalent circuit was mathematically analyzed. Therebvy a new signal line potential variation model due to the switching mosie was developed. Th emodel was verified with 0.35.mu.m CMOS deivce model parameters. The model has an excellent agreement with HSPICE simulation. Thus the proposed model can be dirctly employed in the industry to design the high-performance integrted circuit design as well as integrated circuit package design.

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Design of redundancy interface between TCMS and ATC system, and brake control of free-axle system (TCMS와 ATC장치간 인터페이스 이중계 구현 및 무축제동 제어방안)

  • Hong Gu-sun;Han Shin;Han Jeong-soo
    • Proceedings of the KSR Conference
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    • 2004.10a
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    • pp.1461-1466
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    • 2004
  • Recently Domestic EMU's on board signal systems are gradually changed form Cab signal(Fix Block) to Distance-to-go. Interfaces with on board signal system, TCMS Redundancy structure is mainly required. This paper suggest Manaul/Automatic Driving based on TCMS-ATC interface and design of backup system which is operated by Stan-by Computer when one of it's Local Interface Unit(LIU) is out of oder. For the purpose of Precision Train Stop, Distance-to-go signal system require accuracy speed. Free-axle structure is required for this system This paper suggest Free-axle braking system that lack of brake-force is compensated by the distributed brake-force using TCMS. And one of braking system has out of order, compensation of brake-force for Free-axle system. Then we prove our design to Complete Car Test

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Small-Signal Analysis of a Differential Two-Stage Folded-Cascode CMOS Op Amp

  • Yu, Sang Dae
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.6
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    • pp.768-776
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    • 2014
  • Using a simplified high-frequency small-signal equivalent circuit model for BSIM3 MOSFET, the fully differential two-stage folded-cascode CMOS operational amplifier is analyzed to obtain its small-signal voltage transfer function. As a result, the expressions for dc gain, five zero frequencies, five pole frequencies, unity-gain frequency, and phase margin are derived for op amp design using design equations. Then the analysis result is verified through the comparison with Spice simulations of both a high speed op amp and a low power op amp designed for the $0.13{\mu}m$ CMOS process.

Design of EMC countermeasures for radar signal processing board (레이다 신호처리 보드의 EMC 대책 설계)

  • Hong-Rak Kim;Man-hee Lee;Youn-Jin Kim;Seong-ho Park
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.23 no.5
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    • pp.41-46
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    • 2023
  • It is very important to meet the maximum detection range in a radar system. In order to meet the maximum detection Range, the sensitivity of the received signal of the radar system must be high. In addition, the dynamic range should be wide in the radar signal processing board. To meet these requirements, the signal processing board must be designed to be robust against external and internal noise. In particular, a design is required to minimize the effect of noise generated by various switching circuits inside the board on the received radar signal. In this paper, we derive the requirements of the signal processor board to meet the radar system performance and describe the design to meet the derived requirements. In addition, the EMC design to minimize the influence of noise input from the outside or generated from the inside is described. Confirm the secured performance through the test of the manufactured board.

The DOE Based Robust Design to Reduce the Brake Squeal Noise (실험계획법에 기반한 브레이크 스퀼 노이즈 저감을 위한 강건 설계)

  • Kwon, Seong-Jin;Kim, Mun-Sung;Lee, Bong-Hyun;Lee, Dong-Won;Bae, Chul-Yong;Kim, Chan-Jung
    • Transactions of the Korean Society of Automotive Engineers
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    • v.15 no.2
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    • pp.126-134
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    • 2007
  • Although there has been substantial research on the squeal noise for the automotive brake system, robust design issues with respect to control factors equivalent to design variables in optimization, noise factors due to system uncertainties, and signal factors designed to accommodate a user-adjustable setting still need to be addressed. For the purpose, the robust design applied to the disk brake system has been investigated by DOE (Design of Experiments) based Taguchi analysis with dynamic characteristics. The specific goal of this methodology is to identify a design with linear signal-response relationship, and variability minimization. The finite element models of the disk brake assembly have been constructed, and the squeal noise problems have been solved by complex eigenvalue analysis. As the practical robust design to reduce the brake squeal noise, material properties of pad, disk, and backplate, thickness and geometry of pad are selected as control factors, material properties of pad and disk, and the contact stiffness have been considered as noise factors, and friction coefficient between pad and disk is chosen as a signal factor. Through the DOE based robust design, the signal-to-noise ratio and the sensitivity for each orthogonal array experiment have been analyzed. Also, it has been proved that the proposed robust design is effective and adequate to reduce the brake squeal noise.

Design of Portable Signal Analysis System for Mobile WiMax Base Station (휴대형 모바일 와이맥스 기지국 신호분석 시스템 설계)

  • Choi, Jong-Ho
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.4 no.1
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    • pp.39-45
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    • 2011
  • In this paper, the design method of portable signal analysis system is proposed and the hardware module is implemented for operation of base stations based on a common platform for mobile WiMax. The new signal analysis method is implemented as two modules; a broadband RF module and a DSP based digital signal analysis module. The RF module performs the RF-IF down conversion and gain control. And the digital module measure the base staion signal. The differences of performance are insignificant in the experiment results performed through the comparison of other fixed-large system and proposed system.

A Performance Analysis of Multi-GNSS Receiver with Various Intermediate Frequency Plans Using Single RF Front-end

  • Park, Kwi Woo;Chae, Jeong Geun;Song, Se Phil;Son, Seok Bo;Choi, Seungho;Park, Chansik
    • Journal of Positioning, Navigation, and Timing
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    • v.6 no.1
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    • pp.1-8
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    • 2017
  • In this study, to design a multi-GNSS receiver using single RF front-end, the receiving performances for various frequency plans were evaluated. For the fair evaluation and comparison of different frequency plans, the same signal needs to be received at the same time. For this purpose, two synchronized RF front-ends were configured using USRP X310, and PC-based software was implemented so that the quality of the digital IF signal received at each front-end could be evaluated. The software consisted of USRP control, signal reception, signal acquisition, signal tracking, and C/N0 estimation function. Using the implemented software and USRP-based hardware, the signal receiving performances for various frequency plans, such as the signal attenuation status, overlapping of different systems, and the use of imaginary or real signal, were evaluated based on the C/N0 value. The results of the receiving performance measurement for the various frequency plans suggested in this study would be useful reference data for the design of a multi-GNSS receiver in the future.

Design and Applications of a Generalized Software-Based GNSS IF Signal Generator

  • Lim, Deok-Won;Park, Chan-Sik;Lee, Sang-Jeong
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • v.2
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    • pp.211-215
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    • 2006
  • In this paper, design and applications of a generalized, versatile and customizable IF signal generator that can model the modernized GPS and Galileo signal is given. It generates IF sampled data that can be directly used by a software receiver. Entire constellation of satellites which is independent of satellite-user geometry is easily determined using a real or simulated ephemeris data. Since the IF center frequency, sampling frequency and quantization bit number are user location dependent parameters, their effects are also considered in IF signal generator. The generalized IF signal generator will be very well suited for the development phase of a software receiver due to its versatility. The full access to the sampling frequency, front-end filter definition and ADC parameters also offers a great opportunity for cost-effective analysis of tracking loops and error mitigation techniques at the receiver level. Interference sources can be easily added to the generator to simulate specific environments. This software IF signal generator can also be used to feed a multi-frequency multi-system software receiver for the prototyping of a combined GPS/Galileo receiver. The test result using the generated signals and a real software receiver shows the effectiveness of the implemented IF signal generator.

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Design and Fabrication of Teletext Bit Slicer IC (Teletext Bit Slicer 집적회로의 설계 및 제작)

  • 申明澈;張榮旭;金永生;高鎭秀;明贊奎;閔聖基
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.3
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    • pp.384-388
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    • 1986
  • This paper describes the design and fabrication of an integrated circuit that can detect the teletext signal included in a composite video signal. The circuit that is based on the comparatorlevel sampling method can detect a stable data signal even from an external circuit with large variation. It has been fabricated by the SST bipolar standard process. Its chip size is $2.5x3.78mm^2$.

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Real time analysis of multichannel EEG signal (다중채널 EEG 신호의 실시간 해석에 관한 연구)

  • 조재희;장태규;양원영
    • 제어로봇시스템학회:학술대회논문집
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    • 1992.10a
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    • pp.829-833
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    • 1992
  • This paper presents the design of an automated EEG analyzing system. The design considerations including processing speed, A/D conversion, filtering, and waveforms detection, are overviewed with the description of the associated EEG characteristics. The architecture of the currently implemented system consists of a p-controller based front-end signal processing unit and a host computer system. The data acquisition procedures are described along with a couple of illustrations of the acquired EEG/EOG signal.

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