• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.507-508
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• 2006

High performance delta-sigma modulator is developed for audio-codec applications(i.e.. 16-bit resolution at a 20kHz signal bandwidth). The modulator is realized with fully-differential switched capacitor integrators. All stages employ a single-stage folded-cascode amplifier. The presented delta-sigma modulator when clocked at 3.2MHz achieves 85.2dB peak-SNDR and 94.8dB SNR. This modulator is designed in a SAMSUNG $0.18{\mu}m$ CMOS process. Finally, this paper shows the test setup and FFT result gained from delta-sigma modulator chip designed for audio applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.50-59
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• 2007

[ $0.18-{\mu}m$ ] CMOS 1.2-V 2nd-order ${\Sigma}{\Delta}$ modulator with full-feedforward topology is designed. Using full-feedforward topology makes op-amp performance requirements much less stringent, therefore it has been adopted as a good candidate for low-voltage low-power applications throughout the world. Also, ${\Sigma}{\Delta}$ modulator is designed with top-down design approach, therefore various nonideal effects of op-amp are modeled in this paper.

• Korean Journal of Remote Sensing
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• v.34 no.4
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• pp.639-647
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• 2018

This paper presents TerraSAR-X and KOMPSAT-5 sigma nought variation according to season and antenna observation configuration in Mongolia. Two types of landcover including bare surface and cropland were examined. The seasonal variation of sigma nought in cropland was about 7 dB and particularly a significant sigma nought reduction occurred after harvest. On the contrary, the Mongolia bare surface provides a consistent sigma nought values for several years with an annual variation less than 2.5 dB of standard deviation. However, the bare soil was relatively sensitive to look-direction (or ascending or descending mode) as well as incidence angle while the cropland was almost independent of antenna look-direction and small incidence angle changes. Although the look-directional variation of bare surface sigma nought was observed in this study, the look-direction anisotropic nature of the surface was not well examined. A further study would be required to account for this feature with various SAR observation configurations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.8
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• pp.1558-1563
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• 2007

In this paper, phase-locked loop (PLL) of a combinational architecture consisting of an adaptive bandwidth and fractional-N is presented to improve performances and reduce the order of ${\Delta}{\Sigma}$ modulator while maintaining equivalent or better performance with fast locking. The architecture of adaptive bandwidth PLL was simulated by HSPICE using 0.35m CMOS parameters. The behavioral simulation of the proposed adaptive bandwidth fractional-N PLL with a ${\Delta}{\Sigma}$ modulator was carried out by using MatLab to determine if the architecture could achieve the objectives. The HSPICE simulation showed that this type of PLL was able to fast locking, and reduce fractional spurs about 20dB.

• Bulletin of the Korean Mathematical Society
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• v.53 no.4
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• pp.971-983
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• 2016

A partially ordered set P is ideal-homogeneous provided that for any ideals I and J, if $$I{\sim_=}_{\sigma}J$$, then there exists an automorphism ${\sigma}^*$ such that ${\sigma}^*{\mid}_I={\sigma}$. Behrendt [1] characterizes the ideal-homogeneous partially ordered sets of height 1. In this paper, we characterize the ideal-homogeneous partially ordered sets of height 2 and nd some families of ideal-homogeneous partially ordered sets.

• ETRI Journal
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• v.29 no.6
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• pp.835-837
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• 2007

A multi-bit sigma-delta modulator architecture is described for low-distortion performance and a high-speed operation. The proposed architecture uses both a delayed code and a delayed differential code of analog-to-digital converter in the feedback path, thereby suppressing signal components in the integrators and relaxing the timing requirement of the analog-to-digital converter and the scrambler logic. Implemented by a 0.13 ${\mu}m$ CMOS process, the sigma-delta modulator achieves high linearity. The measured spurious-free dynamic range is 89.1 dB for -6 dBFS input signal.

• Journal of the Korean Mathematical Society
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• v.32 no.2
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• pp.279-287
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• 1995

Let $F$ be a set of distributions on R with the topology of weak convergence, and let $A$ be the $\sigma$-field generated by the open sets. We denote by $F_1^\infty$ the space consisting of all infinite sequence $(F_1, F_2, \cdots), F_n \in F and R_1^\infty$ the space consisting of all infinite sequences $(x_1, x_2, \cdots)$ of real numbers. Take the $\sigma$-field $F_1^\infty$ to be the smallest $\sigma$-field of subsets of $F_1^\infty$ containing all finite-dimensional rectangles and take $B_1^\infty$ to be the Borel $\sigma$-field $R_1^\infty$.

• The Pure and Applied Mathematics
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• v.9 no.1
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• pp.9-17
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• 2002

In this Paper, we will show that every basically disconnected space is a projective object in the category $Tych_{\sigma}$ of Tychonoff spaces and $_{\sigma}Z^{#}$ -irreducible maps and that if X is a space such that ${\Beta} {\Lambda} X={\Lambda} {\Beta} X$, then X has a projective cover in $Tych_{\sigma}$. Moreover, observing that for any weakly Linde1of space, ${\Lambda} X : {\Lambda} X\;{\longrightarrow}\;X$ is $_{\sigma}Z^{#}$-irreducible, we will show that the projective objects in $wLind_{\sigma}$/ of weakly Lindelof spaces and $_{\sigma}Z^{#}$-irreducible maps are precisely the basically disconnected spaces.

• The Pure and Applied Mathematics
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• v.10 no.4
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• pp.207-215
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• 2003

Let R be a prime ring with characteristic different from two and let $\theta,\varphi,\sigma,\tau$ be the automorphisms of R. Let d : $R{\rightarrow}R$ be a nonzero ($\theta,\varphi$)-derivation. We prove the following results: (i) if $a{\in}R$ and [d(R), a]$_{{\theta}o{\sigma},{\varphi}o{\tau}}$=0, then $\sigma(a)\;+\;\tau(a)\;\in\;Z$, the center of R, (ii) if $d([R,a]_{\sigma,\;\tau)\;=\;0,\;then\;\sigma(a)\;+\;\tau(a)\;\in\;Z$, (iii) if $[ad(x),\;x]_{\sigma,\;\tau}\;=\;0;for\;all\;x\;\in\;RE$, then a = 0 or R is commutative.

• International Journal of Automotive Technology
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• v.4 no.4
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• pp.193-201
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• 2003

The problem of brake judder is typically caused by defects of quality manufacturing. DFSS (Design for six sigma) is a design process for quality improvement. DFSS will result in more improved but less expensive quality products. This paper presents an implementation of DFSS for quality improvement of the brake judder of heavy-duty trucks. Carrying out 5 steps of DFSS, the major reasons for defects of quality are found. The numerical approximation of the brake system is derived by means of the response surface method. Its quality for brake judder is improved by using the sigma based robust design methodology. Results are compared between the conventional deterministic optimal design and the proposed sigma based robust design. The proposed one shows that manufacturing cost may increase as the quality level increase. The proposed one, however, is more economical in aspect of the overall cost since the probability of failure dramatically goes down.