Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of a 94.8dB SNR 1-bit 4th-order high-performance delta-sigma Modulator

94.8dB의 SNR을 갖는 1-bit 4차 고성능 델타-시그마 모듈레이터 설계

  • Choi, Young-Kil (School of Electrical and Computer Engineering Hanyang University) ;
  • Roh, Hyung-Dong (School of Electrical and Computer Engineering Hanyang University) ;
  • Byun, San-Ho (School of Electrical and Computer Engineering Hanyang University) ;
  • Lee, Hyun-Tae (School of Electrical and Computer Engineering Hanyang University) ;
  • Kang, Kyoung-Sik (School of Electrical and Computer Engineering Hanyang University) ;
  • Roh, Jeong-Jin (School of Electrical and Computer Engineering Hanyang University)
  • 최영길 (한양대학교 전자컴퓨터공학부) ;
  • 노형동 (한양대학교 전자컴퓨터공학부) ;
  • 변산호 (한양대학교 전자컴퓨터공학부) ;
  • 이현태 (한양대학교 전자컴퓨터공학부) ;
  • 강경식 (한양대학교 전자컴퓨터공학부) ;
  • 노정진 (한양대학교 전자컴퓨터공학부)
  • Published : 2006.06.21
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Abstract

High performance delta-sigma modulator is developed for audio-codec applications(i.e.. 16-bit resolution at a 20kHz signal bandwidth). The modulator is realized with fully-differential switched capacitor integrators. All stages employ a single-stage folded-cascode amplifier. The presented delta-sigma modulator when clocked at 3.2MHz achieves 85.2dB peak-SNDR and 94.8dB SNR. This modulator is designed in a SAMSUNG $0.18{\mu}m$ CMOS process. Finally, this paper shows the test setup and FFT result gained from delta-sigma modulator chip designed for audio applications.

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