• 전자공학회논문지D
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• 제35D권11호
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• pp.70-77
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• 1998

본 논문에서는 nickel/silicon carbide(Ni/SiC) 접합에 의한 Schottky 다이오드를 제작하고, 그 전기적 특성을 조사하였다. Ni/4H-SiC의 경우, 산화막 모서리 단락을 하였을 때 상온에서 973V의 역방향 항복전압이 측정되었으며 이는 모서리 단락되지 않은 Schottky 다이오드의 역방향 항복전압 430V에 비해 매우 높았다. Ni/6H-SiC Schottky 다이오드의 경우, 산화막으로 모서리 단락시켰을 때와 시키지 않았을 때의 역방향 항복전압은 각각, 920V와 160V 였다. 고온에서의 소자 특성도 매우 좋아서 Ni/4H-SiC Schottky 다이오드와 Ni/6H-SiC Schottky 다이오드 모두 300℃까지 전류 특성의 변화가 거의 없었으며 550℃에서도 양호한 정류 특성을 보였다. 상온에서의 Schottky barrier height와 이상인자(ideality factor) 및 specific on-resistance는 Ni/4H-SiC의 경우는 1.55eV, 1.3, 3.6×10/sup -2/Ω·㎠이었으며 Ni/6H-SiC Schottky 다이오드의 경우에 1.24eV, 1.2, 2.6×10/sup -2Ω·㎠/로 나타났다. 실험 결과 Ni/4H-SiC 및 Ni/6H-SiC Schottky 다이오드 모두 고온, 고전압 소자로서 우수한 특성을 나타냄이 입증되었다.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1999년도 춘계학술발표강연 및 눈문개요집
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• pp.40-40
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• 1999

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.591-592
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• 2006

Schottky diodes for Radio-frequency identification (RFID) tag integration on chip were designed and fabricated using Samsung electronics System LSI standard $0.18{\mu}m$ CMOS process. Schottky diodes were designed as interdigitated fingers array by CMOS layout design rule. 64 types of Schottky diode were designed and fabricated with the variation of finger width, length and numbers with a $0.6{\mu}m$ guard ring enclosing n-well. Titanium was used as Schottky contact metal to lower the Schottky barrier height. Barrier height of the fabricated Schottky diode was 0.57eV. DC current - voltage measurements showed that the fabricated Schottky diode had a good rectifying properties with a breakdown voltage of -9.15 V and a threshold voltage of 0.25 V.

• 한국전기전자재료학회논문지
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• 제31권6호
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• pp.367-371
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• 2018

1,200 V class junction barrier schottky (JBS) diodes and schottky barrier diodes (SBD) were simultaneously fabricated on the same 4H-SiC wafer. The resulting diodes were characterized at temperatures from room temperature to 473 K and subsequently compared in terms of their respective I-V characteristics. The parameters deduced from the observed I-V measurements, including ideality factor and series resistance, indicate that, as the temperature increases, the threshold voltage decreases whereas the ideality factor and barrier height increase. As JBS diodes have both Schottky and PN junction structures, the proper depletion layer thickness, $R_{on}$, and electron mobility values must be determined in order to produce diodes with an effective barrier height. The comparison results showed that the JBS diodes exhibit a larger effective barrier height compared to the SBDs.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.600-600
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• 2013

We have fabricated Cr nanodot Schottky diodes utilizing AAO templates formed on n-Si substrates. Three different sizes of Cr nanodots (about 75.0, 57.6, and 35.8 nm) were obtained by controlling the height of the AAO template. Cr nanodot Schottky diodes showed a rectifying behavior with low SBHs of 0.17~0.20 eV and high ideality factors of 5.6~9.2 compared to those for the bulk diode. Also, Cr nanodot Schottky diodes with smaller diameters yield higher current densities than those with larger diameters. These electrical behaviors can be explained by both Schottky barrier height (SBH) lowering effects and enhanced tunneling current due to the nanoscale size of the Schottky contact. Also, we have fabricated Cr-Si nanorod Schottky diodes with three different lengths (130, 220, and 330 nm) by dry etching of n-Si substrate. Cr-Si nanorod Schottky diodes with longer nanorods yield higher reverse current than those with shorter nanorods due to the enhanced electric field, which is attributed to a high aspect ratio of Si nanorod.

• 반도체디스플레이기술학회지
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• 제14권1호
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• pp.27-30
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• 2015

SiC based Schottky barrier diodes were prepared by using the facing targets sputtering method. In this research, 4H-SiC polytypes of SiC were adopted and Molybdenum, Titanium was employed as the Schottky metal of the metal-semiconductor contacts. Both structures showed the rectifying nature in their forward and reverse J-V characteristic curve and the ideality factors calculated from these plots that were close to unity were represented the nearly ideal behavior. Difference of Schottky barrier height between prepared devices was also corresponding with the electrical characteristics of themselves. Therefore the suitability of the facing targets sputtering method for fabrication of Schottky diodes could be suggested from these results.

• 대한전자공학회논문지
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• 제27권3호
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• pp.101-107
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• 1990

본 논문에서 유한차분법을 이용하여 Pt-GaAs Schottky Barrier Diode(SBD)를 일차원으로 simulation하였다. 반도체의 지배방정식인 포아송 방정식(poisson equation)과 전류연속 방정식)current continuity equation)을 이산화 시킨 다음 Newton-Raphson 방법으로 선형화시켜서 가우스 소거법으로 해가 수렴할 때까지 반복적으로 풀었다. 이 SBD의 해석에 필요한 경계조건은 열전자방출-확산이론(thermionic emission-diffusion theory)으로부터 Schottky Barrier의 경계조건을 취하였다. 에피층을 갖는 SBD를 모델링하여 인가전압에 따른 다이오드에서의 전위와 전자의 분포를 simulation 하였다. 전위에 따라 변하는 접속층을 고려하여 실험치와 잘 일치하는 결과를 얻었다.

• 전기전자학회논문지
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• 제26권2호
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• pp.306-312
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• 2022

서로 다른 PN 비율과 금속화 어닐링 온도에 의해 장벽 높이가 다른 4H-SiC 병합 PiN Schottky(MPS) 다이오드의 전기적 특성과 심층 트랩을 조사했다. MPS 다이오드의 장벽 높이는 IV 및 CV 특성에서 얻었다. 전위장벽 높이가 낮아짐에 따라 누설 전류가 증가하여 10배의 전류가 발생하였다. 또한, 심층 트랩(Z_1/2 및 RD_1/2)은 4개의 MPS 다이오드에서 DLTS 측정을 통해 밝혀졌다. DLTS 결과를 기반으로, 트랩 에너지 준위는 낮은 장벽 높이와 함께 22~28%의 얕은 수준으로 확인되었다. 이는 쇼트키 장벽 높이에 대해 DLTS에 의해 결정된 결함 수준 및 농도의 의존성을 확인할 수 있다.

• 전자공학회논문지A
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• 제31A권1호
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• pp.71-76
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• 1994

Schottky diodes have been fabricated using the SDB wafer, and their characteristics have been investigated. For comparison, conventional planar and etched most structure were made on the same substrate. The ideality factor and barrier height of the fabricated devices are found to be 1.03 and 0.77eV, respectively. Breakdown volttge of the etched mesa Schottky diode has been increased to 180V. whereas it is 90V for the planar diode. Schottky diode with an etched mesa exhibits twice improvement in breaktown voltage.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.205-208
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• 2001

Schottky barrier diodes are fabricated on a intrinsic GaN(4${\mu}{\textrm}{m}$) epitaxial structure grown by rf plasma molecular beam epitaxy (MBE) on sapphire substrates. First, We make Ohmic electrodes (Ti/Al/Ti/Au) by evaporator. Next, we contact RuO$_2$ by dipping in the solution (RuCl$_3$.HClO$_4$), and then we deposit Ni/Au on the surface of RuO$_2$ by evaporator. We study the electrical characteristics of GaN Schottky barrier diodes made by these methods. Measurements are C-V, I-V, SEM, EDX, and XRD for the characteristics of devices. Thickness of RuO$_2$ layer depends on supplied voltage and dipping time. Device of thinner RuO$_2$ layer have a good Schottky characteristics compare with device of thicker RuO$_2$ layer