• 제목/요약/키워드: redundancy method

검색결과 557건 처리시간 0.025초

5상 유도전동기 구동 시스템을 위한 인버터의 개방고장진단 방법 (Open Fault Diagnosis Method for Five-Phase Induction Motor Driving System)

  • 백승구;신혜웅;강성윤;박춘수;이교범
    • 전기학회논문지
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    • 제65권2호
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    • pp.304-310
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    • 2016
  • This paper proposes a fault diagnosis method for an open-fault in inverter driving five-phase induction motor. The five-phase induction motor has a high output torque and small torque ripple in comparison to three-phase. The best advantage of the five-phase induction motor is fault diagnosis and tolerant control using redundancy of phases. This paper uses an inverter as a power converter for driving a five-phase induction motor. If a switch of inverter occurs to the open-fault, this problem is the influence on the output current and output torque. To solve this problem, there is need of an accurate diagnosis and fault switch distinction. Therefore, this paper propose a fault detection method of the open-fault switches for the fault diagnosis. First, analyzing the pattern for the open-circuit fault of one phase. next, analyzing the pattern for the open-circuit fault of each inverter switches. Through the pattern analysis, It defines the scope of each of the failure switch. Thereafter, By using an algorithm that proposes to perform a fault diagnosis method. The proposed algorithm is verified from the experiment with the 1.5 kW five-phase induction motor.

레벨별로 상세화된 공간 데이터를 위한 새로운 공간 인덱싱 기법 (A New Spatial Indexing Method for Level-Of-Detailed Data)

  • 권준희;윤용익
    • 한국멀티미디어학회논문지
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    • 제5권4호
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    • pp.361-371
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    • 2002
  • GIS에 있어 효율적인 액세스 기법은 가장 중요한 요구사항 중 하나이다. 레벨별로 상세화된 공간 데이터를 사용하게 되면 한번에 모든 데이터를 검색할 필요가 없어 효율적인 공간 데이터 검색이 가능해진다 데이터 검색을 위한 기존의 공간 인덱싱 기법은 이러한 레벨별로 상세화된 공간 데이터를 효율적으로 다루지 못한다. 이를 위해 레벨별로 상세화된 공간 데이터를 위한 공간 인덱싱 기법이 알려졌다. 그러나 이 기법들은 단순화와 선택 연산자를 거친 몇 가지 종류의 레벨별로 상세화된 데이터만을 지원한다는 문제점을 가진다 이러한 문제점들을 해결하고자 본 논문에서는 모든 종류의 레벨별로 상세화된 공간 데이터를 지원하면서 검객이 효율적으로 이루어지는 새로운 공간 인덱싱 기법을 제안한다. 제안된 기법은 레벨별로 각각의 인덱스 구조가 한 개의 인덱스 구조로 통합된다. 실험 결과는 제안된 기법이 데이터 중복이 발생하지 않으면서도 검색 성능이 우수함을 보인다.

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대조적 학습을 활용한 주요 프레임 검출 방법 (Key Frame Detection Using Contrastive Learning)

  • 박경태;김원준;이용;장래영;최명석
    • 방송공학회논문지
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    • 제27권6호
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    • pp.897-905
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    • 2022
  • 비디오 영상 내 주요 프레임(Key Frame) 검출은 컴퓨터 비전 분야에서 꾸준히 연구되고 있는 분야 중 하나이다. 최근 심층학습(Deep Learning) 기술의 발전으로 비디오 영상에서의 주요 프레임 검출 성능이 향상 되었으나, 다양한 종류의 영상 콘텐츠 및 복잡한 배경으로 인해 여전히 효과적인 학습이 어려운 문제점이 있다. 본 논문에서는 대조적 학습(Contrastive Learning)과 메모리 뱅크(Memory Bank)를 통해 영상의 주요 프레임을 검출하는 새로운 방법을 제안한다. 제안하는 방법은 입력 프레임과 같은 영상 내 이웃하는 프레임 간 차이와 다른 영상 내 프레임과의 차이를 기반으로 특징 추출 신경망을 학습한다. 이와 같은 대조적 학습을 통해 메모리 뱅크에 주요 프레임을 저장 및 갱신하여 영상의 중복성을 효과적으로 제거한다. 비디오 영상 데이터셋에서의 실험 결과를 통해 제안하는 방법의 성능을 검증하였다.

Multiresolution Wavelet-Based Disparity Estimation for Stereo Image Compression

  • Tengcharoen, Chompoonuch;Varakulsiripunth, Ruttikorn
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2004년도 ICCAS
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    • pp.1098-1101
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    • 2004
  • The ordinary stereo image of an object consists of data of left and right views. Therefore, the left and right image pairs have to be transmitted simultaneously in order to display 3-dimentional video at the remote site. However, due to the twice data in comparing with a monoscopic image of the same object, it needs to be compressed for fast transmission and resource saving. Hence, it needs an effective coding algorithm for compressing stereo image. It was found previously that compressing left and right frames independently will achieve the compression ratio lower than compressing by utilizing the spatial redundancy between both frames. Therefore, in this paper, we study the stereo image compression technique based on the multiresolution wavelet transform using varied disparity-block size for estimation and compensation. The size of disparity-block in the stereo pair subbands are scaling on a coarse-to-fine wavelet coefficients strategy. Finally, the reference left image and residual right image after disparity estimation and compensation are coded by using SPIHT coding. The considered method demonstrates good performance in both PSNR measures and visual quality for stereo image.

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SOP Image SRAM Buffer용 다양한 데이터 패턴 병렬 테스트 회로 (Parallel Testing Circuits with Versatile Data Patterns for SOP Image SRAM Buffer)

  • 정규호;유재희
    • 대한전자공학회논문지SD
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    • 제46권9호
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    • pp.14-24
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    • 2009
  • System on panel 프레임 버퍼를 위한 메모리 셀 어레이와 주변회로가 설계되었다. 또한, system on panel 공정의 낮은 yield를 극복하기 위해, 블럭 단위의 parallel test 방안이 제안되었다. 기존의 메모리 테스트 보다 빠르게 fault detection이 가능하며, 다양한 embedded memory나 일반 SRAM 테스트 분야에도 적용 가능하다. 또한 기존의 다양한 test vector pattern이 그대로 적용될 수 있어 fault coverage가 높고, 최근의 추세인 hierarchical bit line과 divided word line 구조에도 적용될 수 있다.

Expanded Exit-Pupil Holographic Head-Mounted Display With High-Speed Digital Micromirror Device

  • Kim, Mugeon;Lim, Sungjin;Choi, Geunseop;Kim, Youngmin;Kim, Hwi;Hahn, Joonku
    • ETRI Journal
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    • 제40권3호
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    • pp.366-375
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    • 2018
  • Recently, techniques involving head-mounted displays (HMDs) have attracted much attention from academia and industry owing to the increased demand for virtual reality and augmented reality applications. Because HMDs are positioned near to users' eyes, it is important to solve the accommodation-vergence conflict problem to prevent dizziness. Therefore, holography is considered ideal for implementing HMDs. However, within the Nyquist region, the accommodation effect is limited by the space-bandwidth-product of the signal, which is determined by the sampling number of spatial light modulators. In addition, information about the angular spectrum is duplicated over the Fourier domain, and it is necessary to filter out the redundancy. The size of the exit-pupil of the HMD is limited by the Nyquist sampling theory. We newly propose a holographic HMD with an expanded exit-pupil over the Nyquist region by using the time-multiplexing method, and the accommodation effect is enhanced. We realize time-multiplexing by synchronizing a high-speed digital micromirror device and a liquid-crystal shutter array. We also demonstrate the accommodation effect experimentally.

수많은 모듈로 구성된 이진 매니플레이터 역기구 설계를 위한 연속변수공간 최적화 신기법 연구 (New Continuous Variable Space Optimization Methodology for the Inverse Kinematics of Binary Manipulators Consisting of Numerous Modules)

  • 장강원;남상준;김윤영
    • 대한기계학회논문집A
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    • 제28권10호
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    • pp.1574-1582
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    • 2004
  • Binary manipulators have recently received much attention due to hyper-redundancy, light weight, good controllability and high reliability. The precise positioning of the manipulator end-effecter requires the use of many modules, which results in a high-dimensional workspace. When the workspace dimension is large, existing inverse kinematics methods such as the Ebert-Uphoff algorithm may require impractically large memory size in determining the binary positions of all actuators. To overcome this limitation, we propose a new inverse kinematics algorithm: the inverse kinematics problem is formulated as an optimization problem using real-valued design variables, The key procedure in this approach is to transform the integer-variable optimization problem to a real-variable optimization problem and to push the real-valued design variables as closely as possible to the permissible binary values. Since the actual optimization is performed in real-valued design variables, the design sensitivity becomes readily available, and the optimization method becomes extremely efficient. Because the proposed formulation is quite general, other design considerations such as operation power minimization can be easily considered.

고급 언어에서 ASIP을 위한 전용 부호 생성 기술 연구 (A Custom Code Generation Technique for ASIPs from High-level Language)

  • 알람 삼술;최광석
    • 디지털산업정보학회논문지
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    • 제11권3호
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    • pp.31-43
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    • 2015
  • In this paper, we discuss a code generation technique for custom transport triggered architecture (TTA) from a high-level language structure. This methodology is implemented by using TTA-based Co-design Environment (TCE) tool. The results show how the scheduler exploits instruction level parallelism in the custom target architecture and source program. Thus, the scheduler generates parallel TTA instructions using lower cycle counts than the sequential scheduling algorithm. Moreover, we take Tensilica tool to make a comparison with TCE. Because of the efficiency of TTA, TCE takes less execution cycles compared to Tensilica configurations. Finally, this paper shows that it requires only 7 cycles to generate the parallel TTA instruction set for implementing Cyclic Redundancy Check (CRC) applications as an input design, and presents the code generation technique to move complexity from the processor software to hardware architecture. This method can be applicable lots of channel Codecs like CRC and source Codecs like High Efficiency Video Coding (HEVC).

Locally Initiating Line-Based Object Association in Large Scale Multiple Cameras Environment

  • Cho, Shung-Han;Nam, Yun-Young;Hong, Sang-Jin;Cho, We-Duke
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제4권3호
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    • pp.358-379
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    • 2010
  • Multiple object association is an important capability in visual surveillance system with multiple cameras. In this paper, we introduce locally initiating line-based object association with the parallel projection camera model, which can be applicable to the situation without the common (ground) plane. The parallel projection camera model supports the camera movement (i.e. panning, tilting and zooming) by using the simple table based compensation for non-ideal camera parameters. We propose the threshold distance based homographic line generation algorithm. This takes account of uncertain parameters such as transformation error, height uncertainty of objects and synchronization issue between cameras. Thus, the proposed algorithm associates multiple objects on demand in the surveillance system where the camera movement dynamically changes. We verify the proposed method with actual image frames. Finally, we discuss the strategy to improve the association performance by using the temporal and spatial redundancy.

EMB 시스템의 모델 기반 센서 고장 검출 알고리즘 개발 (Model-based Sensor Fault Detection Algorithm for EMB System)

  • 황우현;양이진;허건수
    • 한국자동차공학회논문집
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    • 제20권1호
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    • pp.1-7
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    • 2012
  • The brake-by-wire technology is a new automotive chassis system that allows standard braking operations by electronic components with lighter weights and faster response. The brake-by-wire units such as EMB (Electro-Mechanical Brake) are controlled by electronic sensors and actuators and, thus, the fault diagnosis is essential for implementation. In this study, a model-based fault diagnosis system is developed for the sensors based on the analytical redundancy method. The fault detection algorithm is verified in simulations for various faulty cases. A test bench is built including the EMB unit and the performance of the proposed fault diagnosis system is evaluated through the experiment.