• Journal of the Korean Vacuum Society
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• v.7 no.1
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• pp.17-23
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• 1998

$Pb(Fe_{0.5}Nb_{0.5}O_3(PFN)$ thin films were prepared by rf magnetron co-sputtering method on $SiO_2/Si$, ITO/glass, and $Pt/Ti/SiO_2/Si$ substrates and post-annealed at the $N_2$ atmosphere by RTA(rapid thermal annerling). The degree of crystallinity of PFN films was identified on various substrates. Electrical properties of PFN films was characterized for $Pt/PFN/Pt/Ti/SiO_2/Si$ structure. The composition of PFN films was estimated by EPMA (electron probe micro analysis). PFN films would be crystallized better to perovskite phase on ITO/glass substrate than $SiO_2/Si$ substrate. This may be induced by the deformation of Pb deficient pyrochlore phase due to Pb diffusion into $SiO_2/Si$ substrate. PFN films on $Pt/Ti/SiO_2/Si$ substrate. PFN films with 5-10% Pb excess were crystallized to perovskite phase from $500^{\circ}C$ temperature. In summary, we show that Pb composition and annealing temperature were critically influenced on crystallinity to perovskite phase. When PFN film with 17% Pb excess was annealed at $600^{\circ}C$ at the $N_2$ atmosphere for 300kV/cm and 88. Its remnant polarization coercive field $2.0 MC/cm^2$ and 144kV/cm, respectively.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.3
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• pp.615-620
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• 2008

We fabriacted thermal evaporated $10nm-Ni_{1-x}Co_x$(x=0.2, 0.6, and 0.7) films on 70 nm-thick polysilicon substrate with $0.5{\mu}m$ line width. NiCo composite silicide layers were formed by rapid thermal annealing (RTA) at the temperatures of $700^{\circ}C$ and $1000^{\circ}C$. Then, we checked the microstructure evaluation of silicide patterns. A FIB (focused ion beam) was used to micro-mill the interconnect patterns with low energy condition (30kV-10pA-2 sec). We investigated the possibility of selective removal of silicide layers. It was possible to remove low resistance silicide layer selectively with the given FIB condition for our proposed NiCo composite silicides. However, the silicides formed from $Ni_{40}Co_{60}$ and $Ni_{30}Co_{70}$ composition showed void defects in interconnect patterns. Those void defects hinder the selective milling for the NiCo composite silicides.

• Korean Journal of Materials Research
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• v.15 no.5
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• pp.318-322
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• 2005

Ti-capped NiSi contacts were formed on $p^+/n$ junctions to improve the leakage problem and then Cu was deposited without removing the Ti-capping layer in an attempt to utilize as a diffusion barrier. The electrical characteristics of these $p^+/n$ diodes with Cu/Ti/NiSi electrodes were measured as a function of drive-in RTA(rapid-thermal annealing) and silicidation temperature and time. When drive-in annealed at $900^{\circ}C$, 10 sec. and silicided at $500^{\circ}C$, 100 sec., the diodes showed the most excellent I-V characteristics. Especially, the leakage current was $10^{-10}A$, much lower than reported data for diodes with NiSi contacts. However, when the $p^+/n$ diodes with Cu/Ti/NiSi contacts were furnace-annealed at $400^{\circ}C$ for 40 min., the leakage current increased by 4 orders. The FESEM and AES analysis revealed that the Ti-capping layer effectively prohibited the Cu diffusion, but was ineffective against the NiSi dissociation and consequent Ni diffusion.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.2
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• pp.120-124
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• 2005

In this work, MOS capacitors were used to study the electrical properties of Mo gate electrode deposited on ZrO$_2$. The workfunctions of Mo gate extracted from C-V curves were appropriate for PMOS. Thermal stability of Mo metal was investigated by analyzing the variations of workfunction and EOT(effective oxide thickness) after 600, 700, and 800 $^{\circ}C$ RTA(rapid thermal annealing). It was found that Mo gate was stable up to 800 $^{\circ}C$ with underlying ZrO$_2$. The resistivities of Mo were 35$\mu$Ω$.$cm∼ 75$\mu$Ω$.$cm. These values are lower than those of heavily doped polysilicon. Based on these measurements, it can be concluded that Mo metal gate with ZrO$_2$ gate insulator is an excellent gate material for PMOS.

• Journal of the Korean Ceramic Society
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• v.53 no.5
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• pp.563-567
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• 2016

The structural properties of $HfO_2$ films could be improved by thermal treatment owing to their crystallization. We deposited $HfO_2$ films on sapphire by radio frequency (RF) magnetron sputtering, whose base vacuum pressure was lower than $4.5{\times}10^{-6}$ Pa, RF power was 100 W, working temperature was $200^{\circ}C$, working pressure was 3 mTorr, and the density of the active gas (Argon) was 20 sccm. After depositing the $HfO_2$ films, the samples were thermally treated by rapid thermal annealing (RTA) in $O_2$ ambient at different temperatures. Subsequently, the measured physical properties (structural, morphological, and optical) indicated that the crystallite size, refractive index at a wavelength of 632 nm, and packing density increased with rising temperatures. In particular, an $HfO_2$ film thermally treated at $800^{\circ}C$ in $O_2$ ambient had the highest refractive index of 2.0237 and packing density of 0.9638. The relation between optical and structural properties was also analyzed.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.261-261
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• 2016

플래시 메모리 (flash memory)는 DRAM(dynamic racdom access memory)이나 SRAM(static random access memory)에 비해 소자의 구조가 매우 단순하기 때문에 집적도가 높아서 기기의 소형화가 가능하다는 점과 제조비용이 낮다는 장점을 가지고 있다. 또한, 전원을 차단하면 정보가 사라지는 DRAM이나 SRAM과 달리 전원이 꺼지더라도 저장된 정보가 지워지지 않는다는 특징을 가지고 있어서 ROM(read only memory)과 정보의 입출력이 자유로운 RAM의 장점을 동시에 가지기 때문에 활용도가 크다. 또한, 속도가 빠르고 소비전력이 작아서 USB 드라이브, 디지털 TV, 디지털 캠코더, 디지털 카메라, 휴대전화, 개인용 휴대단말기, 게임기 및 MP3 플레이어 등에 널리 사용되고 있다. 특히, 낸드(NAND)형의 플래시 메모리는 고집적이 가능하며 하드디스크를 대체할 수 있어 고집적 음성이나 화상 등의 저장용으로 많이 쓰이며 일정량의 정보를 저장해두고 작업해야 하는 휴대형 기기에도 적합하며 가격도 노어(NOR)형에 비해 저렴하다는 장점을 가진다. 최근에는 smart watch, wearable device 등과 같은 차세대 디스플레이 소자에 대한 관심이 증가함에 따라 투명하고 유연한 메모리 소자에 대한 연구가 다양하게 진행되고 있으며 유리나 플라스틱과 같은 기판 위에서 투명한 플래시 메모리를 형성하는 기술에 대한 관심이 높아지고 있다. 전하트랩형 (charge trap type) 플래시 메모리는 플로팅 게이트형 플래시 메모리와는 다르게 정보를 절연막 층에 저장하므로 인접 셀간의 간섭이나 소자의 크기를 줄일 수 있기 때문에 투명하고 유연한 메모리 소자에 적용이 가능한 차세대 플래시 메모리로 기대되고 있다. 전하트랩형 플래시메모리는 정보를 저장하기 위하여 tunneling layer, trap layer, blocking layer의 3층으로 이루어진 게이트 절연막을 가진다. 전하트랩 플래시 메모리는 게이트 전압에 따라서 채널의 전자가 tunnel layer를 통해 trap layer에 주입되어 정보를 기억하게 되는데, trap layer에 주입된 전자가 다시 채널로 빠져나가는 charge loss 현상이 큰 문제점으로 지적된다. 따라서 tunnel layer의 막질향상을 위한 다양한 열처리 방법들이 제시되고 있으며, 기존의 CTA (conventional thermal annealing) 방식은 상대적으로 높은 온도와 긴 열처리 시간을 가지고, RTA (rapid thermal annealing) 방식은 매우 높은 열처리 온도를 필요로 하기 때문에 플라스틱, 유리와 같은 다양한 기판에 적용이 어렵다. 따라서 본 연구에서는 기존의 열처리 방식보다 에너지 전달 효율이 높고, 저온공정 및 열처리 시간을 단축시킬 수 있는 마이크로웨이브 열처리(microwave irradiation, MWI)를 도입하였다. Tunneling layer, trap layer, blocking layer를 가지는 MOS capacitor 구조의 전하트랩형 플래시 메모리를 제작하여 CTA, RTA, MWI 처리를 실시한 다음, 전기적 특성을 평가하였다. 그 결과, 마이크로웨이브 열처리를 실시한 메모리 소자는 CTA 처리한 소자와 거의 동등한 정도의 우수한 전기적인 특성을 나타내는 것을 확인하였다. 따라서, MWI를 이용하면 tunnel layer의 막질을 향상시킬 뿐만 아니라, thermal budget을 크게 줄일 수 있어 차세대 투명하고 유연한 메모리 소자 제작에 큰 기여를 할 것으로 예상한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.631-637
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• 2003

We have evaluated structural and electric, ferroelectric properties of PZT(30/70) thick film prepared by using 1,3-propanediol based sol-gel method on Pt/Ti/SiO$_2$/Si substrates. Rapid thermal annealing (RTA) is used to reduce the thermal stress and final furnace annealing is processed at $650^{\circ}C$. As the results of SEM analysis, we find that we get 350 nm in thickness for one coating and 1 $\mu$m for three times of coating. In the results of C-D analysis at 1 kHz, dielectric constant ($\varepsilon$$_{r}$) and dissipation factor were 886 and 0.03, respectively. C-V curve is shaped as a symmetrical butterfly. Leakage current density at 200 kV/cm is 1.23${\times}$10$^{-5}$ A/cm$^2$ and in the results of hysteresis loops measured at 150 kV/cm, the remnant polarization (P$_{r}$) and the coercive field (E$_{c}$) are 33.8 $\mu$C/cm$^2$ and 56.9 kV/cm, respectively. PZT(30/70) thick film exhibits relatively good ferroelectric, electric properties.s..

• Journal of the Korean Vacuum Society
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• v.11 no.3
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• pp.151-158
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• 2002

Fabricated were ultra-shallow $p^+-n$ junctions on n-type Si(100) substrates using decaborane $(B_{10}H_{14})$ ion implantation. Decaborane ions were implanted at the acceleration voltages of 5 kV to 10 kV and at the dosages of $1\times10^{12}\textrm{cm}^2$.The implanted specimens were annealed at $800^{\circ}C$, $900^{\circ}C$ and $1000^{\circ}C$ for 10 s in $N_2$ atmosphere through a rapid thermal process. From the measurement of the implantation-induced damages through $2MeV^4 He^{2+}$ channeling spectra, the implanted specimen at the acceleration voltage of 15 kV showed higher backscattering yield than those of the bare n-type Si wafer and the implanted specimens at 5 kV and 10 kV. From the channeling spectra, the calculated thicknesses of amorphous layers induced by the ioin implantation at the acceleration voltages of 5 kV, 10 kV and 15 kV were 1.9 nm, 2.5 nm and 4.3 nm, respectively. After annealing at $800^{\circ}C$ for 10 s in $N_2$ atmosphere, most implantation-induced damages of the specimens implanted at the acceleration voltage of 10 kV were recovered and they exhibited the same channeling yield as the bare Si wafer. In this case, the calculated thickness of the amorphous layer was 0.98 nm. Hall measurements and sheet resistance measurements showed that the dopant activation increased with implantation energy, ion dosage and annealing temperature. From the current-voltage measurement, it is observed that leakage current density is decreased with the increase of annealing temperature and implantation energy.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.1 s.38
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• pp.1-5
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• 2006

We prepared 80 nm-thick TiSix on each 70 nm-thick amorphous silicon and polysilicon substrate using an RF sputtering with $TiSi_2$ target. TiSix composite silicide layers were stabilized by rapid thermal annealing(RTA) of $800^{\circ}C$ for 20 seconds. Line width of $0.5{\mu}m$ patterns were embodied by photolithography and dry etching process, then each additional annealing process at $750^{\circ}C\;and\;850^{\circ}C$ for 3 hours was executed. We investigated the change of sheet resistance with a four-point probe, and cross sectional microstructure with a field emission scanning electron microscope(FE-SEM) and transmission electron microscope(TEM), respectively. We observe an abrupt change of resistivity and voids at the silicide surface due to interdiffusion of silicide and composite titanium silicide in the amorphous substrates with additional $850^{\circ}C$ annealing. Our result implies that the electrical resistance of composite titanium silicide may be tunned by employing appropriate substrates and annealing condition.

• Journal of the Semiconductor & Display Technology
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• v.9 no.1
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• pp.41-47
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• 2010

The effects of thermal treatment on CNTs, which were coated with a-$CN_x$ thin film, were investigated and related to variations of chemical bonding and morphologies of CNTs and also properties of field emission induced by thermal treatment. CNTs were directly grown on nano-sized conical-type tungsten tips via the inductively coupled plasma-chemical vapor deposition (ICP-CVD) system, and a-$CN_x$ films were coated on the CNTs using an RF magnetron sputtering system. Thermal treatment on a-$CN_x$ coated CNT-emitters was performed using a rapid thermal annealing (RTA) system by varying temperature ($300-700^{\circ}C$). Morphologies and microstructures of a-$CN_x$/CNTs hetero-structured emitters were analyzed by FESEM and HRTEM. Chemical composition and atomic bonding structures were analyzed by EDX, Raman spectroscopy, and XPS. The field emission properties of the a-$CN_x$/CNTs hetero-structured emitters were measured using a high vacuum (below $10^{-7}$ Torr) field-emission measurement system. For characterization of emission stability, the fluctuation and degradation of the emission current were monitored in terms of operation time. The results were compared with a-$CN_x$ coated CNT-emitters that were not thermally heated as well as with the conventional non-coated CNT-emitters.