• 한국전자통신학회논문지
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• 제18권4호
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• pp.571-578
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• 2023

본 논문에서는 차내 통신을 위한 데이터 송신기에 지연고정루프를 접목한 회로를 제안한다. 낮은 전자기 간섭 특성을 가진 송신기의 설계를 위해 낮은 슬루율을 가지며, 회로 소자의 공정에 따른 변화로 인한 슬루율 변화량을 보정할 수 있는 지연고정루프를 적용하였다. 시뮬레이션 결과에 의하면, 지연고정루프가 적용된 송신기는 기존의 송신기보다 낮은 슬루율 변화량을 가진다. 제안한 구조의 회로는 65nm 공정으로 설계되었으며, 데이터 전송속도는 20Mbps, 공급전압은 1.1V이다. 지연고정루프가 있는 송신기는 기존의 송신기에 대비하여 빠른 조건에서 53.6% 낮은 슬루율 변화량, 느린 조건에서 13.07% 낮은 슬루율 변화량을 가진다.

• Journal of Electrical Engineering and Technology
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• 제8권6호
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• pp.1431-1438
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• 2013

A pack-level battery hardware-in-the-loop simulation (B-HILS) platform is implemented. It consists of dynamic vehicle models using PSAT and multiple control interfaces including real-time 3D driving and GPS mode. In real-time 3D driving mode, user can drive a virtual vehicle using actual drive equipment such as steering wheel and accelerator to generate the cycle profile of the battery. In GPS mode, actual road traffic and terrain effects can be simulated using GPS data while the trajectory is displayed on Google map. In the latter part of the paper, several performance tests of an actual lithium-polymer battery pack are carried out utilizing the developed system. All experiments are conducted as parts of actual development process of a commercial battery pack adopting 2nd generation Prius as a target vehicle model. Through the experiments, the low temperature performance and fuel efficiency of the battery are quantitatively investigated in comparison with the original nickel-metal hydride (NiMH) pack of the Prius.

• 한국정보통신학회논문지
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• 제18권12호
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• pp.2933-2938
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• 2014

전류컨베이어 회로를 이용한 주파수 고정 루프 회로를 $0.35{\mu}m$ CMOS 공정으로 설계하였다. 공급전압은 3volts를 사용하였다. 설계된 회로는 분주기, 주파수-전압 변환기, 전압 감산기 및 발진기로 구성하였으며, 각 회로 블록을 대칭적으로 배치하여 공정 변화에 따른 신뢰성 특성을 향상시켰다. HPICE 시뮬레이션 결과 MOS 트랜지스터의 채널길이, 채널 폭, 저항 및 커패시터의 크기가 ${\pm}5%$ 변화할 때 출력주파수의 변화율은 ${\pm}1%$ 내외였다.

• 펄프종이기술
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• 제38권2호
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• pp.1-8
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• 2006

In this study a process simulation method was used to analyze the accumulation phenomena of anionic starch in the process white water as the closure level of a fine paper making process is increased. A pilot paper machine was used as a model process. Dynamic simulations of the influence of white water usage ratio and uncoated broke addition ratio on the variation of process variable was monitored as a function of time. Results from the dynamic simulations showed that the volume of reservoirs affected the dynamic behavior of the process. The dynamic behavior of flow rate and dissolved starch concentration in process units were different from each other. The speed of the change of dissolved starch concentration in process units was depend on the starting point of the change of dissolved starch concentration, the length of circulation loop, and the volume of reservoirs.

• 대한안전경영과학회지
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• 제18권4호
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• pp.179-183
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• 2016

The purposes of this research are to modelize test system of SM TESTING by ARENA, software, input several items of specimen's testing process, resources of system and transfer loop, etc, give a hypothesis and then, obtain results reducing the efficiency of the whole system finally by overload of specific facilities in the testing system through the simulation so as to obtain several materials such as specimen and testing facility, transfer loop, etc. by simple and various forms without any necessity of numerical modelization. It will add facilities of over load and reduce facilities with low operation rate, so increase the efficiency of the system.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1992년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 19-21 Oct. 1992
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• pp.194-199
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• 1992

In this paper, each section of an Electrolytic Tinning Line is mathematically modelled with the coupling effect accounted for. Based on the modelling, PI and feedforward controllers are designed for speed control or tension control of each section of the process line. It is shown through simulatios that the tension of the stip is controlled precisely along the entire line and the contituety of the process is insured when using the efficient control of loop towers.

• 한국정보통신학회논문지
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• 제11권5호
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• pp.949-954
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• 2007

본 논문에서는 CMOS 공정을 이용하여 동작온도에 무관한 FVC(Frequency-to-Voltage Convener) 회로를 제안한다. FVC는 FLL(Frequency Locked Loop)의 핵심 회로로서 주파수 신호를 전압신호로 변환하는 회로이다. FLL 회로는 PLL(Phase-Locked Loop) 회로 같이 고정된 주파수 신호를 생성하는 회로지만, PLL과는 달리 위상비교기, charge pump, 저역 필터 등이 필요치 않아 간단히 회로를 구성할 수 있다. FVC 회로의 설계는 $0.25{\mu}m$ CMOS 공정을 이용하였다. 설계되어진 회로의 입력 주파수는 70MHz에서 140MHz를 사용하였다. 회로의 시뮬레이션 결과 동작 온도가 $0^{\circ}C$에서 $75^{\circ}C$까지 변화할 때 변환된 출력 전압의 변화는 상온에 비하여 ${\pm}2%$이내였다.

• 전자공학회논문지
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• 제51권5호
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• pp.99-105
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• 2014

위상 잡음과 위상고정 시간을 최소화하기 위해 최적화 된 대역폭을 변화 시키지 않고 기준 주파수 신호 스퍼를 줄일 수 있는 두 개의 대칭 루프를 가진 위상고정루프(PLL)를 설계 하였다. 기준 주파수 신호 스퍼를 감쇄시키는 원리는 PLL에 사용되는 전압제어발진기(VCO)의 입력전압을 안정화시키는 것이다. 이것을 위해 설계된 PLL은 종래 PLL과 다르게 2개의 출력을 갖는 위상주파수검출기(PFD), 2개의 루프필터, 2개의 입력전압을 갖는 VCO, 그리고 분주기로 구성되었다. $0.18{\mu}m$ CMOS 공정파라미터를 사용하여 동작원리를 시뮬레이션 한 결과 종래의 단일 루프 PLL과 비교할 때 스퍼 크기가 약 1/2로 감소된 것을 확인하였다. 또한 루프필터에 사용된 R과 C가 5% 오차를 갖고 있을 경우에도 스퍼 크기가 약 1/2로 감소된 것을 확인하였다. 사용된 공급전압은 1.8V이고 소비전력은 6.3mW이였다.

• 한국자동차공학회논문집
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• 제21권1호
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• pp.128-136
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• 2013

This study presents the development of Gateway Control Module using SAE J1939 protocol for the commercial vehicles. Presently, the load rate of CAN bus is increased by the single network composition and addition of new ECUs for development of intelligent vehicles. Because the embedded system of the integrated network control function has the errors of the CAN bus caused by the increase of ECU, it is needed for development of commercial vehicles. Also, this study presents the development of smart functions that can diagnosis CAN bus errors, fault diagnosis of ECU and basic function that arbitrates CAN bus between ECUs of commercial vehicle. GCM was designed for 4channel separation about Gateway function as solution of load rate decrease and smart functions. HILS(Hardware in the loop simulation)system that can achieve simulation about CAN Messages of all systems on vehicle was applied to evaluate performance and verification of all functions and performance. The load rate on CAN bus was decreased at using functions what was delivery, block and process of GCM. Through this, it was enabled to organize systematic architecture for gateway.

• 농촌지도와개발
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• 제24권2호
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• pp.99-115
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• 2017

The purpose of this study is to analyze potential adoption rates and reusing patterns of the new rice direct seeding technology. The model constructed and employed in this study is a system dynamics model of farmer adoption and reusing patterns for this new technology over time. The model incorporates a causal loop diagram that explains interactions among rice cultivation subsystems with feedback loops and further attempts to build a causal loop model with stock-flow diagram for computer simulation. As one example of how the model can be used to provide insight to rice farmers, simulations are run over varying levels on the cultivation process of rice. The major finding is to demonstrate the utility of system dynamics simulation methodology in aiding the rice wet direct seeding farmers' decision making.