• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.120-121
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• 2007

Nano-floating gate memory (NFGM) devices were fabricated by using the low temperature poly-Si thin films crystallized by ELA and the $In_2O_3$ nano-particles embedded in polyimide layers as charge storage. Memory effect due to the charging effects of $In_2O_3$ nano-particles in polyimide layer was observed from the TFT NFGM. The post-annealing in 3% diluted hydrogen $(H_2/N_2)$ ambient improved the retention characteristics of $In_2O_3$ nano-particles embedded poly-Si TFT NFGM by reducing the interfacial states as well as grain boundary trapping states.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.250-253
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• 2009

Effective methods for monitoring the quality of polycrystalline silicon (poly-Si) films are discussed. Raman spectroscopy is typically used to determine crystallinity of poly-Si, but this method has limitations for data gathering on large substrates for mass production of poly-Si TFT backplanes. Spectroscopic ellipsometry is proposed as an alternative for fast and simple estimation of poly-Si quality on large substrates. By using both ellipsometry and Raman spectroscopy, it is possible to determine whether the quality and uniformity of the poly-Si films meet the criteria required for mass production of TFT backplanes for AMOLED panels.

• E2M - 전기 전자와 첨단 소재
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• 제9권10호
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• pp.1001-1007
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• 1996

The conduction mechanisms of the off-current in low temperature (.leq. >$600^{\circ}C$) processed polycrystalline silicon thin film transistors (LTP poly-Si TFT'S) have been systematically studied. Especially, the temperature and bias dependence of the off-current between hydrogenated and nonhydrogenated poly-Si TFT's were investigated and compared. The off-current of nonhydrogenated poly-Si TF's is because of a resistive current at low gate and drain voltage, thermally activated current at high gate and low drain voltage, and Poole-Frenkel emission current in the depletion region near the drain at high gate and drain voltage. After hydrogenation it has shown that the off -current mechanism is caused mainly by thermal activation and that the field-induced current component is suppressed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.507-510
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• 1998

Performance of AMLCD pixels depends on the electrical characteristics of thin film transistor switches. The high quality of LCD can be obtained by minimizing the process and device variations of TFT. The effect of process and device factors on poly-Si TFT characteristics are calculated by ATHENA and ATLAS, and the optimized design windows based on statistical design of experiment are suggested for high performance 20 inch LCD are suggested for high performance 20 inch LCD monitors.

• 한국정보전자통신기술학회논문지
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• 제2권1호
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• pp.3-9
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• 2009

AMOLED 디스플레이는 LCD에 비해 넓은 시야각, 빠른 응답 속도, 박막화의 용이성 등의 많은 장점들을 갖고 있으나 불균일한 TFT의 전기적 특성과 전원선의 전압 강하에 의한 휘도 불균일, 잔상 현상 및 수명 등과 같은 많은 문제점들이 있다. 이 중에서 본 논문에서는 구동 TFT 소자의 hysteresis 현상에 의해 발생하는 가역적 잔상 현상을 개선하고자 한다. TFT의 hysteresis 특성을 개선하기 위해 게이트 산화막 증착 전에 표면 처리 조건을 변경하였다. 게이트 산화막 증착 전에 실시한 자외선 및 수소 플라즈마 표면 처리는 게이트 산화막과 다결정 실리콘 박막 사이의 계면 trap 밀도를 $3.11{\times}10^{11}cm^{-2}$로 감소시켰고, hysteresis 레벨을 0.23 V로 줄였으며 출력 전류 변화율을 3.65 %로 감소시켰다. 자외선 및 수소 플라즈마 처리를 행함으로써 AMOLED 디스플레이의 가역적 잔상을 많이 개선할 수 있을 것으로 기대된다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2000년도 제18회 학술발표회 논문개요집
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.533-536
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• 2006

VIATRON TECHNOLOGIES has developed Field-Enhanced Rapid Thermal Processor (FERTP) system that enables LTPS LCD and AMOLED manufacturers to produce poly-Si films at low cost, high throughput, and high yield. The FE-RTP allows the diverse process options including crystallization, thermal oxidation of gate oxides and fast pre-compactions. The process and equipment compatibility with a-Si TFT lines is able to provide a viable solution to produce poly-Si TFTs using a-Si TFT lines.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.430-431
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• 2006

This letter reports the fabrication of polycrystalline silicon thin-film transistors (poly-Si TFT) on flexible plastic substrates using amorphous silicon (a-Si) precursor films by sputter deposition. The a-Si films were deposited with mixture gas of argon and helium to minimize the argon incorporation into the film. The precursor films were then laser crystallized using XeCl excimer laser irradiation and a four-mask-processed poly-Si TFTs were fabricated with fully self-aligned top gate structure.

• Journal of Information Display
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• 제11권1호
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• pp.12-16
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• 2010

The effect of the crystallization and activated annealing of Si films using an excimer laser and the new CW blue laser are described and compared with furnace annealing for application in advanced TFTs and for future applications. Pulsed excimer laser annealing (ELA) is currently being used extensively as a low-temperature poly-silicon (LTPS) process on glass substrates as its efficiency is high in the ultra-violet (UV) region for thin Si films with thickness of 40-60 nm. ELA enables extremely low resistivity relating to high crystallinity for both the n- and p-type Si films. On the other hand, CW blue laser diode annealing (BLDA) enables the smooth Si surface to have arbitral crystal grains from micro-grains to an anisotropic huge grain structure only by controlling its power density. Both annealing techniques are expected to be applied in the future advanced TFT systems.

• 전자공학회논문지D
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• 제34D권4호
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• pp.33-39
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• 1997

The crystallization temperature of an amorphous silicon (a-Si) can be lowered down to 400.deg. C by a new method : Double-metal induced lateral crystallization (DMILC). The a-Si film was laterally crystallized from Ni and Pd deposited area, and its lateral crystallization rate reaches up to 0.2.mu.m/hour at that temperature and depends on the overlap length of Ni and Pd films; the shorter the overlap length, the faster the rate. Poly-Silicon thin film transistors (poly-Si TFT's) fabricated by DMILC at 400.deg. C show a field effect mobility of 38.5cm$^{3}$/Vs, a minimum leakage current of 1pA/.mu.m, and a slope of 1.4V/dec. The overlap length does not affect the characteristics of the poly-Si TFT's, but determines the lateral crystallization rate.