전자공학회논문지D (Journal of the Korean Institute of Telematics and Electronics D)

대한전자공학회 (The Institute of Electronics and Information Engineers)
권호 표지

이중 금속 측면 결정화를 이용한 40$0^{\circ}C$ 다결정 실리콘 박막 트랜지서터 제작 및 그 특성에 관한 연구

Fabrication and Characteristics of poly-Si thin film transistors by double-metal induced lteral crystallization at 40$0^{\circ}C$

  • 이병일 (서울대학교 재료공학부) ;
  • 정원철 (서울대학교 재료공학부) ;
  • 김광호 (서울대학교 재료공학부) ;
  • 안평수 (서울대학교 재료공학부) ;
  • 신진욱 (서울대학교 재료공학부) ;
  • 조승기 (서울대학교 재료공학부)
  • 발행 : 1997.04.01
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초록

The crystallization temperature of an amorphous silicon (a-Si) can be lowered down to 400.deg. C by a new method : Double-metal induced lateral crystallization (DMILC). The a-Si film was laterally crystallized from Ni and Pd deposited area, and its lateral crystallization rate reaches up to 0.2.mu.m/hour at that temperature and depends on the overlap length of Ni and Pd films; the shorter the overlap length, the faster the rate. Poly-Silicon thin film transistors (poly-Si TFT's) fabricated by DMILC at 400.deg. C show a field effect mobility of 38.5cm$^{3}$/Vs, a minimum leakage current of 1pA/.mu.m, and a slope of 1.4V/dec. The overlap length does not affect the characteristics of the poly-Si TFT's, but determines the lateral crystallization rate.

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