• 전기의세계
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• v.22 no.5
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• pp.5-11
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• 1973

A new method of forming silicon p$^{+}$-n-n$^{+}$ junctions has been attempted by using the VDH-Implanter (Vacuum Discharge and Heating). Each of p$^{+}$-n and n-n$^{+}$ junctions was formed on both sides of an n-type silicon substrate by means of predeposition of each dopant and their bombarding due to rarefied air ions together with the preheating of the substrate in the implanter. The recifying principle of the p$^{+}$-n-n$^{+}$ junctions is thought to be based on the theory of double injection. The I-V characteristic of the diode has shown that it has a fairly high forward current density with the desirable rise due to vary low voltage though the reverse voltage is a little low on account of the low resistivity of the silicon substrate.n substrate.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.355-355
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• 2012

Si (111) 기판 위에 polystyrene (PS) bead를 사용하여 만들어진 약 100 nm 나노 구멍에 GaN나노선을 molecular beam epitaxy 법으로 성장하였다. 성장 온도와 III/V 비율 변화에 대하여 성장된 GaN 나노선의 모양과 광학적 특성은 scanning electron microscopy (SEM)와 photoluminescence (PL) 등으로 조사하였으며, InN/GaN 이종접합 및 InGaN p-n 다이오드구조를 성장하여 atomic force microscopy의 tip 접촉방법으로 전기적 특성을 조사하였다. PL 측정 결과 성장온도가 높아지면 Ga 빈자리와 관계된 3.28 eV의 donor acceptor pair (DAP) 신호와 3.42 eV의 stacking faults (SF) 결함에 기인된 발광 신호세기가 감소하는 결과를 SEM으로부터 나노선 폭 및 길이는 좁아지면서 짧아지는 것을 관측하였다. 또한 nitrogen 원자양이 증가하면서 Ga 빈자리와 관련된 3.28 eV DAP 신호가 증가하는 것을 관측하였다. 이들 결과로부터 GaN 나노선의 SF 발광 신호관련 원인에 대하여 논의 하였다. AFM을 이용한 I-V 측정으로부터 성장조건 변화에 따른 GaN 나노선 및 p-n 접합 나노선의 전도 특성을 조사하여 나노선의 소자 응용에 대한 기본적인 물리특성을 규명하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.1
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• pp.12-17
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• 2002

In this paper, an effective ionization coefficient for 4H-SiC is extracted in the form of c .E$^{m}$ from ionization coefficients of electron and hole. Analytical expressions for critical electric field and breakdown voltage of 4H-SiC p$^{+}$n junction are derived by employing the effective ionization coefficient. The analytic results agree well with the experimental ones reported within 10% in error for the doping concentration in the range of 10$^{15}$ cm$^{-3}$ ~10$^{18}$ cm$^{-3}$ . .

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.19 no.1
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• pp.6-10
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• 2009

In this paper, a selective area growth (SAG) of a GaN/AlGaN double heterostructure (DH) has been performed on r-plane sapphire substrate by using the mixed-source hydride vapor phase epitaxy (HVPE) with multi-sliding boat system. The SAG-GaN/AlGaN DH consists of GaN buffer layer, Te-doped AlGaN n-cladding layer, GaN active layer, Mg-doped AlGaN p-cladding layer, and Mg-doped GaN p-capping layer. The electroluminescence (EL) characteristics show an emission peak of wavelength, 439 nm with a full width at half maximum (FWHM) of approximately 0.64 eV at 20 mA. The I-V measurements show that the turn-on voltage of the SAG-GaN/AlGaN DH is 3.4 V at room temperature. We found that the mixed-source HVPE method with a multi-sliding boat system was one of promising growth methods for III-Nitride LEDs.

• Journal of the Korean Institute of Telematics and Electronics
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• v.10 no.3
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• pp.1-9
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• 1973

Gallium phosphide light emitting diode (LED) has been fabricated first time for pilot lamp and numeric display purposes. Bright red light is obtained in forward bias at very low current of one to five mA. A typical p-n junction is formed by liquid phase epitaxial growth on a n-type gallium physphide substrate. The crystal growth is achieved at about 1300$^{\circ}$K after the equilibrium of the gallium solution followed by tipping operation. The ohmic contact is made by wire bonding by thermal compression technique. The entire process is well fit for laboratory scale to fabricate a few hundred diodes for mainly demonstration purpose. For mass production, a large sum of the capital investment is required. The great merit of gallium phosphide LED is at low current operation, and green light emission is also obtainable by nitrogen doping.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.2
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• pp.7-12
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• 2007

A SPICE-based 3-dimensional circuit model of LED(Light-Emitting Diode) was developed for the design optimization and analysis of high-brightness LEDs. An LED is represented as an array of pixel LEDs with small preassigned areas, and each of the pixel LEDs is composed of circuit networks representing the thin-film layers(n-metal, n- and p-type semiconductor layers, and p-metal), ohmic contacts, and pn-junctions. Each of the thin-film layers and contact resistances is modeled by a resistance network, and the pn-junction is modeled by a conventional pn-junction diode. It has been found that the simulation results using the model and the corresponding parameters precisely fit the measured LED characteristics.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.2
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• pp.72-75
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• 2006

A CMOS compatible Super Junction LDMOS (SJ-LDMOS) structure, which reduces substrate-assisted depletion effects, is reported. The proposed structure uses a N-buffer layer between the pillars and P-substrate to achieve global charge balance between the pillars, the N-buffer layer and the P-substrate. The new structure features high breakdown voltage, low on-resistance, and reduced sensitivity to doping imbalance in the pillars.

• Korean Journal of Materials Research
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• v.10 no.12
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• pp.812-818
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• 2000

We studied the effects of Ge preamorphization (PAM) on 0.25$\mu\textrm{m}$ Ti-salicide junctions using comparative study with As PAM. For each PAM schemes, ion implantations are performed at a dose of 2E14 ion/$\textrm{cm}^2$ and at 20keV energy using $^{75}$ /As+and GeF4 ion sources. Ge PAM showed better sheet resistance and within- wafer uniformity than those of As PAM at 0.257m line width of n +/p-well junctions. This attributes to enhanced C54-silicidation reaction and strong (040) preferred orientation of the C54-silicide due to minimized As presence at n+ junctions. At p+ junctions, comparable performance was obtained in Rs reduction at fine lines from both As and Ge PAM schemes. Junction leakage current (JLC) revels are below ~1E-14 A/$\mu\textrm{m}^{2}$ at area patterns for all process conditions, whereas no degradation in JLC is shown under Ge PAM condition even at edge- intensive patterns. Smooth $TiSi_2$ interface is observed by cross- section TEM (X- TEM), which supports minimized silicide agglomeration due to Ge PAM and low level of JLC. Both junction break- down voltage (JBV) and contact resistances are satisfactory at all process conditions.

• 한국신재생에너지학회:학술대회논문집
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• 2010.11a
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• pp.58.2-58.2
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• 2010

본 연구에서는 n-type wafer에 비정질 실리콘을 증착한 이종접합 태양전지를 열처리 방법을 이용하여 열처리의 효과를 분석함으로써 이종접합 태양전지에 효율적인 열처리 효과에 대하여 연구하였다. P, N-layer는 PECVD(Plasma-enhanced chemical vapor deposition) I-layer는 HWCVD(Hot wire chemical vapor deposition), ITO는 RF 마그네트론 스퍼터링법으로 동일한 조건에서 제작하였고 rapid thermal process를 이용하여 진공 중에서 $150^{\circ}C$, $200^{\circ}C$, $220^{\circ}C$, $250^{\circ}C$까지 열처리를 하였다. 열처리 전과 후 QSSPC로 minority carrier life time, 자외 가시선 분광분석 장치로 투과 반사도를, Ellipsometer로 흡수 계수 등의 변화를 조사하였다. 열처리 후 Minority carrier life time, Voc 및 광변환 효율이 증가하였다.

• Korean Journal of Materials Research
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• v.11 no.5
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• pp.427-430
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• 2001

We prepared 10cm-diameter Si(100)/500 $\AA$-Si$_3$N$_4$/Si(100) wafer Pairs adopting 500 $\AA$ -thick Si$_3$N$_4$layer as insulating layer between single crystal Si wafers. Si3N, is superior to conventional SiO$_2$ in insulating. We premated a p-type(100) Si wafer and 500 $\AA$ -thick LPCVD Si$_3$N$_4$∥Si (100) wafer in a class 100 clean room. The cremated wafers are separated in two groups. One group is treated to have hydrophobic surface and the other to have hydrophilic. We employed a FLA(fast linear annealing) bonder to enhance the bond strength of cremated wafers at the scan velocity of 0.1mm/sec with varying the heat input at the range of 400~1125W. We measured bonded area using a infrared camera and bonding strength by the razor blade crack opening method. We used high resolution transmission electron microscopy(HRTEM) to probe cross sectional view of bonded wafers. The bonded area of two groups was about 75%. The bonding strength of samples which have hydrophobic surface increased with heat input up to 1577mJ/$m^2$ However, bonding strength of samples which have hydrophilic surface was above 2000mJ/$m^2$regardless of heat input. The HRTEM results showed that the hydrophilic samples have about 25 $\AA$ -thick SiO layer between Si and Si$_3$N$_4$/Si and that maybe lead to increase of bonding strength.