• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.585-586
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• 2008

In this paper, a novel beta-multiplier reference current source circuit for the 800mV power-supply voltage is presented. In order to cope with the narrow input common-mode range of the OpAmp in the reference circuit, shunt resistive voltage divider branches were deployed. High gain OpAmp was designed to compensate intrinsic low output resistance of the MOS transistors. The proposed reference circuit was designed in a standard 0.18um CMOS process with nominal Vth of 420mV and -450mV for nMOS and pMOS transistor respectively. The total power consumption including OpAmp is less than 50uW.

• ETRI Journal
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• v.20 no.1
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• pp.37-45
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• 1998

Reduced surface field lateral double-diffused MOS transistor for the driving circuits of plasma display panel and field emission display in the 120V region have been integrated for the first time into a low-voltage $1.2{\mu}m$ analog CMOS process using p-type bulk silicon. This method of integration provides an excellent way of achieving both high power and low voltage functions on the same chip; it reduces the number of mask layers double-diffused MOS transistor with a drift length of $6.0{\mu}m$ and a breakdown voltage greater than 150V was self-isolated to the low voltage CMOS ICs. The measured specific on-resistance of the lateral double-diffused MOS in $4.8m{\Omega}{\cdot}cm^2$ at a gate voltage of 5V.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• The Journal of the Acoustical Society of Korea
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• v.24 no.6
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• pp.358-364
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• 2005

In this Paper. we present a bitrate scalable speech codec which uses an ITU-T G.723.1 as the baseline coder and encodes the synthesis error signal in an enhancement coder. ITU-T P.862 (PESQ) is used to evaluate the Performance of the bitrate scalable coder. Experiments show that 6.7kbps enhancement layer based on G.723.1 5.3kbps produces the increase of 0.39 in MOS and 5.7kbps enhancement layer based on G.723.1 6.3kbps Produces the increase of 0.267 in MOS.

• 전기의세계
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• v.27 no.4
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• pp.45-51
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• 1978

A new method of realizing the field effect transistor with a sub-.mu. channel width is described. The sub-.mu. channel width is made possible by etching grooves into n$^{+}$ pn$^{[-10]}$ n$^{[-10]}$ structure and using p region at the wall for the channel region of the Metal-Oxide-Semiconductor transistor (MOST), or by diffusing two different types of impurities through the same diffusion mask and using p region at the surface for the channel region of MOST. When the drain voltage is increased at the pn$^{[-10]}$ drainjunction the depletion layer extends into the n$^{[-10]}$ region instead of into p region; this is also the secret of success to realize the sub-.mu. channel width. As the result of the experimental fabrication, a microwave MOST was obtained. The cut-off frequency was calculated to be 15.4 GHz by Linvill's power equation using the measured capacitances and transconductance.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.90.3-90
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• 1998

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.9
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• pp.837-840
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• 2015

Graphene is a single layer of carbon material which shows very high electron mobility, so many kinds of research on the devices using graphene layer have been performed so far. Graphene material is adequate for high frequency and fast operation devices due to its higher mobility. In this research, the actual graphene layer is evaluated using RT-CVD method which can be available for mass production. The mobility of $7,800cm^2/Vs$ was extracted, that is more than 7 times of that in silicon substrate. The graphene transistor model having no band gap is evaluated using both of pMOS and nMOS based on the measured mobility values. And then the response of graphene transistor model regarding to gate length and width is examined.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.695-697
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• 2013

In this paper, temperature sensing circuit using by MOS is proposed. It produces the voltage as output and is applicable for the internal IC temperature measurement. It is designed by two current mirrors using MOS to implement the IC in the CMOS fabrication and is applicable for the various applications. It operates in two mode, temperature mode and sleep mode. From the simulation results, output voltage is measured from 0V to 1.2V by sweeping $0^{\circ}C{\sim}125^{\circ}C$ in temperature mode and output current flows under 100pA in sleep mode.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.5
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• pp.8-14
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• 2007

In this paper, $HfO_2$/Hf stacked film has been applied as the gate dielectric in MOS devices. The $HfO_2$ thin film was deposited on p-type (100) silicon wafers by atomic layer deposition (ALD) using TEMAHf and $O_3$ as precursors. Prior to the deposition of the $HfO_2$ film, a thin Hf metal layer was deposited as an intermediate layer. Round-type MOS capacitors have been fabricated on Si substrates with 2000${\AA}$-thick Al or Pt top electrode. The prepared film showed the stoichiometric components. At the $HfO_2$/Si interface, both Hf-Si and Hf-Si-O bonds were observed, instead of Si-O bond. The sandwiched Hf metal layer suppressed the growing of $SiO_x$ layer so that $HfSi_xO_y$ layer was achieved. It seems that the intermediate Hf metal layer has a benefit for the enhancement of electric characteristics of gate dielectric in $HfO_2$/Si structure.

• Phonetics and Speech Sciences
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• v.16 no.1
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• pp.67-76
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• 2024

Recent advances in text-to-speech (TTS) technology have significantly improved the quality of synthesized speech, reaching a level where it can closely imitate natural human speech. Especially, TTS models offering various voice characteristics and personalized speech, are widely utilized in fields such as artificial intelligence (AI) tutors, advertising, and video dubbing. Accordingly, in this paper, we propose a one-shot multi-speaker TTS system that can ensure acoustic diversity and synthesize personalized voice by generating speech using unseen target speakers' utterances. The proposed model integrates a speaker encoder into a TTS model consisting of the FastSpeech2 acoustic model and the HiFi-GAN vocoder. The speaker encoder, based on the pre-trained RawNet3, extracts speaker-specific voice features. Furthermore, the proposed approach not only includes an English one-shot multi-speaker TTS but also introduces a Korean one-shot multi-speaker TTS. We evaluate naturalness and speaker similarity of the generated speech using objective and subjective metrics. In the subjective evaluation, the proposed Korean one-shot multi-speaker TTS obtained naturalness mean opinion score (NMOS) of 3.36 and similarity MOS (SMOS) of 3.16. The objective evaluation of the proposed English and Korean one-shot multi-speaker TTS showed a prediction MOS (P-MOS) of 2.54 and 3.74, respectively. These results indicate that the performance of our proposed model is improved over the baseline models in terms of both naturalness and speaker similarity.