• Asian Journal of Atmospheric Environment
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• v.5 no.4
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• pp.228-236
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• 2011

Since most Green House Gases (GHGs) and air pollutants are generated from the same sources, it will be cost-effective to develop a GHGs reduction plan in combination with simultaneous removal of air pollutants. However, effects on air pollutants reduction according to implementing any GHG abatement plans have been rarely studied. Reflecting simultaneous removal of air pollutants along with the GHGs emission reduction, this study investigated relative cost effectiveness among GHGs reduction action plans in Busan Metropolitan City. We employed the Data Envelopment Analysis (DEA), a methodology that evaluates relative efficiency of decision-making units (DMUs) producing multiple outputs with multiple inputs, for the investigation. Assigning each GHGs reduction action plan to a DMU, implementation cost of each GHGs reduction action plan to an input, and reduction potential of GHGs and air pollutants by each GHGs reduction action plan to an output, we calculated efficiency scores for each GHGs reduction action plan. When the simultaneous removal of air pollutants with the GHGs reduction were considered, green house supply-insulation improvement and intelligent transportation system (ITS) projects had high efficiency scores for cost-positive action plans. For cost-negative action plans, green start network formation and running, and daily car use control program had high efficiency scores. When only the GHGs reduction was considered, project priority orders based on efficiency scores were somewhat different from those when both the removal of air pollutants and GHGs reduction were considered at the same time. The expected action plan priority difference is attributed to great difference of air pollutants reduction potential according to types of energy sources to be reduced.

• Journal of the Korean Solar Energy Society
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• v.32 no.6
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• pp.106-112
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• 2012

As a fuel cell converts the chemical energy of the fuel cell into electrical energy by electrochemical reaction, the fuel cell system is uniquely integrated technique including fuel processor, fuel cell stack, power conditioning system. The residential fuel cell-PCS(Power Conditioning System) needs to convert efficiently the DC current produced by the fuel cell into AC current using single-phase DC-AC inverter. A single-phase DC-AC inverter has naturally low frequency ripple which is twice frequency of the output current. This low frequency(120Hz) ripple reduces the efficiency of the fuel cell. This paper presents notch filter with IP voltage controller to reject specific 120Hz current ripple in single-phase inverter. The notch filter is designed that suppress just only specific frequency component and no phase delay. Finally, the proposed notch filter design method has been verified with computer simulation and experimentation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.40-46
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• 2006

Latching optical switches and optical logic gates AND and OR are demonstrated, for the first time, by the monolithic integration of a vertical cavity lasers with depleted optical thyristor structure, which have not only a low threshold current with 0.65mA, but also a high on/off contrast ratio more than 50dB. By simple operating technique with changing a reference switching voltage, this single device operates as two logic functions, optical logic AND and OR. The thyristor laser fabricated using the oxidation process achieved a high optical output power efficiency and a high sensitivity to the optical input light.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.74-80
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• 2009

This paper describes a $2{\sim}6GHz$ CMOS frequency synthesizer that employs only one LC-tank voltage controlled oscillator (VCO). For wide-band operation, optimized LO signal generator is used. The LC-tank VCO oscillating in $6{\sim}8GHz$ provides the required LO frequency by dividing and mixing the VCO output clocks appropriately. The frequency synthesizer is based on a fractional-N phase locked loop (PLL) employing third-order 1-1-1 MASH type sigma-delta modulator. Implemented in a $0.18{\mu}m$ CMOS technology, the frequency synthesizer occupies the area of $0.92mm^2$ with of-chip loop filter and consumes 36mW from a 1.8V supply. The PLL is completed in less than $8{\mu}s$. The phase noise is -110dBC/Hz at 1MHz offset from the carrier.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.378-386
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• 2017

A return-to-zero (RZ) digital-to-analog converter (DAC) with a tri-state switching scheme is proposed in this paper. The proposed scheme provides a triple weight output for RZ operation by using a conventional differential current switch and simple pseudo-differential F/Fs. The RZ function is realized with only two additional transistors in each F/F cell, which results in a power dissipation increase of less than 5%. To verify the performance of the proposed method, a 10-bit RZ DAC is fabricated using standard 180-nm CMOS technology. Measured results show that the worst SFDR performances are 60 dBc and 55 dBc in the 1st and 2nd Nyquist bands, respectively, when operating at 650 MHz clock frequency. The total power consumption is 64 mW, and the active area occupies $0.25mm^2$.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.39 no.6
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• pp.955-963
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• 2019

Currently, the establishment and management of civil defense shelters are under the initiative of the government and local governments to protect the lives of citizens. In the future, there is a need for efficient civil defense shelters operation through the expansion of general shelters, including designated dedicated shelters. Therefore, it is more efficient to consider the distribution of residents and the location of access to shelters, not the quantitative operation considering only the number of residents. This study uses genetic algorithms and Huff gravity model based on census output data, building data, and road network information to understand the distribution of inhabitants more precisely than existing administrative district data. In addition, the spatial- database was used for efficient data management and fast processing, and if this study is improved, it can be used as a basis for the selection and improvement of general shelters positioning for a wider area.

• Archives of design research
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• v.12 no.3
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• pp.105-114
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• 1999

As the microelectronics technology is developed, new types of smart intelligent products are being emerged. OSD user interface is one of the critical factor in this kind of product, especially brown goods and information devices, as it is responsible for imput and output function. OSD is being treated as accompaniment to hardware in spite of its importance, and therefore is developed from only simple and separate usability testing based on performance measurement. This study propose a usability evaluation method of OSD based on subjective preference to support existing usability testing. The purpose of this analysis is to make clear what is important factor and how its preference level is from the user's viewpoint. The various attributes of OSD are clarified from user's questionaire and interview, and orthogonal array is generated with specified factor levels. The prototypes are generated from rapid prototyping tool and tested in natural simulation environment. The preference data which collected in this usability testing is analyzed with conjoint analysis module. This usability evaluation is not the final stage in user interface design process but the early planned and circulated stage.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.39 no.1
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• pp.16-21
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• 2002

In this paper, a dual type PFD(Phase Frequency Detector) for high speed PLL to improve output characteristics using TSPC(True Single Phase Clocking) circuit is proposed. The conventional 3-state PFD has problems with large dead-zone and long delay time. Therefore, it is not applicable to high-speed PLL(Phase-Locked Loop). A dynamic PFD with dynamic CMOS logic circuit is proposed to improve these problems. But, it has the disadvantage of jitter noise due to the variation of the duty cycle. In order to solve the problems of previous PFD, the proposed PFD improves not only the dead zone and duty cycle but also jitter noise and response characteristics by the TSPC circuit and dual structured PFD circuit. The PFD is consists of a P-PFD(Positive edge triggered PFD) and a N-PFD(Negative edge triggered PFD) and improves response characteristics to increase PFD gain. The Hspice simulation is performed to evaluate the performance of proposed PFD. From the experimental results, it has the better dead zone, duty cycle and response characteristics than conventional PFDs.

• 한국HCI학회:학술대회논문집
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• 2008.02a
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• pp.337-341
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• 2008

This paper presents a vibrotactile space mouse which use pin-type vibrotactile display modules and a gyroscope chip. This mouse is a new interface device which is not only an input device as an ordinary space mouse but also a tactile output device. It consists of a space mouse which use gyroscope chip and vibrotactile display modules which have been developed in our own laboratory. Lately, by development of vibrotactile display modules which have small size and consume low power, vibrotactile displays are available in small sized embedded systems such as wireless mouses or mobile devices. Also, development of new sensors like miniature size gyroscope by MEMS technology enables manufacturing of a small space mouse which can be used in the air not in a plane. The vibrotactile space mouse proposed in this paper recognizes motion of a hand using the gyroscope chip and transmits the data to PC through Bluetooth. PC application receives the data and moves pointer. Also, 2 by 3 arrays of pin-type vibrotactile actuators are mounted on the front side of the mouse where fingers of a user's hand contact, and those actuators could be used to represent various information such as gray-scale of an image or Braille patterns for visually impared persons.

• The Journal of the Korea Contents Association
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• v.2 no.2
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• pp.53-63
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• 2002

As the microelectronics technology is developed, new types d smart intelligent produce are being emerged. OSD user interface is one of the critical factor in this kind of product, especially brown goods and information devices, as it is responsible for input and output function. OSD is being treated as accompaniment to hardware in spite of its importance, and therefore is developed from only simple and separate usability testing based on performance measurement. This study propose a usability evaluation method of OSD based on subjective preference to support existing usability testing. The purpose of this analysis is to make dear what is important factor and how its preference level is from the user's viewpoint. The various attributes of OSD are clarified from user's questionaire and interview, and orthogonal array is generated with specifed factor levels. The prototypes are generated from rapid prototyping tool and tested in natural simulation environment. The preference data which collected in this usability testing is analyzed with conjoint analysis module. This usability evaluation is not the final stage in user interface design process but the early famed and circulated stage.